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Text File  |  1996-05-16  |  155KB  |  4,479 lines
  1. #
  2. #    $Id: stl10017.da@ 1.2 1996/05/15 15:33:25 arisawa Exp $
  3. #
  4. #    Copyright (C) 1995, Diamond Multimedia Systems.
  5. #
  6. #    File:        stl10017.dat
  7. #
  8. #    Purpose:    This file contains the board and mode information for a
  9. #                Stealth 64 Video VRAM: S3 968, 4MB, IBM 526 175Mhz DAC.
  10. #            This file is for Japanese Windows 95.
  11. #
  12.  
  13. [Objects]
  14. Draweng32=s3x6832.drw
  15. Dac=ibm525.dac
  16. Cursor=ibm525.cur
  17. PixClk=ibm525.clk
  18. Draweng=s3x68.drw
  19.  
  20. [BoardInfo]
  21. wMinimumFormatBltWidth16bpp=16
  22. wMinimumFormatBltWidth32bpp=16
  23. bPixelFormatter=1
  24. bViewports=1
  25. bNewMMIO=1
  26. bTwoPtLine=1
  27. ValidateBAR=YES
  28. SwapVLA30A25=YES
  29.  
  30. [Desktops]
  31. 2048,1536,8
  32. 2048,768,8
  33. 1600,1200,16
  34. 1600,1200,8
  35. 1280,1024,24
  36. 1280,1024,16
  37. 1280,1024,8
  38. 1152,864,32
  39. 1152,864,24
  40. 1152,864,16
  41. 1152,864,8
  42. 1024,3072,8
  43. 1024,1536,16
  44. 1024,1536,8
  45. 1024,768,32
  46. 1024,768,24
  47. 1024,768,16
  48. 1024,768,8
  49. 800,600,32
  50. 800,600,24
  51. 800,600,16
  52. 800,600,8
  53. 640,480,32
  54. 640,480,24
  55. 640,480,16
  56. 640,480,8
  57.  
  58. [Viewports]
  59. 1600,1200,16,82,66
  60. 1600,1200,16,75,60
  61. 1600,1200,8,82,66
  62. 1600,1200,8,75,60
  63. 1280,1024,24,79,75
  64. 1280,1024,24,76,72
  65. 1280,1024,24,74,70
  66. 1280,1024,24,64,60
  67. 1280,1024,16,95,90
  68. 1280,1024,16,79,75
  69. 1280,1024,16,76,72
  70. 1280,1024,16,74,70
  71. 1280,1024,16,64,60
  72. 1280,1024,8,95,90
  73. 1280,1024,8,79,75
  74. 1280,1024,8,76,72
  75. 1280,1024,8,74,70
  76. 1280,1024,8,64,60
  77. 1152,864,32,64,70
  78. 1152,864,32,56,60
  79. 1152,864,24,64,70
  80. 1152,864,24,56,60
  81. 1152,864,16,82,90
  82. 1152,864,16,71,75
  83. 1152,864,16,64,70
  84. 1152,864,16,56,60
  85. 1152,864,8,82,90
  86. 1152,864,8,71,75
  87. 1152,864,8,64,70
  88. 1152,864,8,56,60
  89. 1024,768,32,64,80
  90. 1024,768,32,60,75
  91. 1024,768,32,58,72
  92. 1024,768,32,56,70
  93. 1024,768,32,48,60
  94. 1024,768,24,64,80
  95. 1024,768,24,60,75
  96. 1024,768,24,58,72
  97. 1024,768,24,56,70
  98. 1024,768,24,48,60
  99. 1024,768,16,96,120
  100. 1024,768,16,81,100
  101. 1024,768,16,64,80
  102. 1024,768,16,60,75
  103. 1024,768,16,58,72
  104. 1024,768,16,56,70
  105. 1024,768,16,48,60
  106. 1024,768,8,96,120
  107. 1024,768,8,81,100
  108. 1024,768,8,64,80
  109. 1024,768,8,60,75
  110. 1024,768,8,58,72
  111. 1024,768,8,56,70
  112. 1024,768,8,48,60
  113. 800,600,32,75,120
  114. 800,600,32,64,100
  115. 800,600,32,56,90
  116. 800,600,32,46,75
  117. 800,600,32,48,72
  118. 800,600,32,37,60
  119. 800,600,32,35,56
  120. 800,600,24,75,120
  121. 800,600,24,64,100
  122. 800,600,24,56,90
  123. 800,600,24,46,75
  124. 800,600,24,48,72
  125. 800,600,24,37,60
  126. 800,600,24,35,56
  127. 800,600,16,75,120
  128. 800,600,16,64,100
  129. 800,600,16,56,90
  130. 800,600,16,46,75
  131. 800,600,16,48,72
  132. 800,600,16,37,60
  133. 800,600,16,35,56
  134. 800,600,8,75,120
  135. 800,600,8,64,100
  136. 800,600,8,56,90
  137. 800,600,8,46,75
  138. 800,600,8,48,72
  139. 800,600,8,37,60
  140. 800,600,8,35,56
  141. 640,480,32,64,120
  142. 640,480,32,52,100
  143. 640,480,32,48,90
  144. 640,480,32,37,75
  145. 640,480,32,37,72
  146. 640,480,32,31,60
  147. 640,480,24,64,120
  148. 640,480,24,52,100
  149. 640,480,24,48,90
  150. 640,480,24,37,75
  151. 640,480,24,37,72
  152. 640,480,24,31,60
  153. 640,480,16,64,120
  154. 640,480,16,52,100
  155. 640,480,16,48,90
  156. 640,480,16,37,75
  157. 640,480,16,37,72
  158. 640,480,16,31,60
  159. 640,480,8,64,120
  160. 640,480,8,52,100
  161. 640,480,8,48,90
  162. 640,480,8,37,75
  163. 640,480,8,37,72
  164. 640,480,8,31,60
  165.  
  166. [TextMode]
  167. CRT, RUN, EXTENDED_BIOS_FLAGS_2, 1
  168. SHELL, I10, 0x0003,  0x0000
  169. CRT, RUN, REG_LOCK_1, 0x48
  170. CRT, RUN, REG_LOCK_2, 0xA5
  171.  
  172. [GraphicsEnable]
  173. CRT, RMW, LAW_CONTROL, 0xEC, 0x13
  174. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x18
  175.  
  176. [GraphicsDisable]
  177. CRT, RMW, LAW_CONTROL, 0xEC, 0x00
  178. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x00
  179.  
  180. [2048,1536,8]
  181. # Setting Line Pitch
  182. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  183. CRT,RUN,EXT_MODE,0x00
  184. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  185. # Setting Engine Pitch
  186. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  187. CRT,RUN,MEM_CONFIG,0x8f
  188. # Setting Basic Mode Registers.The registers
  189. # below are neither Desktop or Viewport Regs
  190. # Unlock Sequencer
  191. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  192. # Dump Sequencer Registers
  193. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  194. # Dump Graphics Controller Registers
  195. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  196. # Dump Attribute Controller Registers
  197. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  198. # Lock Sequencer
  199. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  200. DAC_IDR, RUN, DAC_OPERATION, 0x02
  201. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  202. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  203. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  204. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  205. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  206. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  207. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  208. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  209. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  210.  
  211. [2048,768,8]
  212. # Setting Line Pitch
  213. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  214. CRT,RUN,EXT_MODE,0x00
  215. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  216. # Setting Engine Pitch
  217. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  218. CRT,RUN,MEM_CONFIG,0x8f
  219. # Setting Basic Mode Registers.The registers
  220. # below are neither Desktop or Viewport Regs
  221. # Unlock Sequencer
  222. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  223. # Dump Sequencer Registers
  224. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  225. # Dump Graphics Controller Registers
  226. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  227. # Dump Attribute Controller Registers
  228. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  229. # Lock Sequencer
  230. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  231. DAC_IDR, RUN, DAC_OPERATION, 0x02
  232. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  233. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  234. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  235. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  236. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  237. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  238. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  239. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  240. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  241.  
  242. [1024,3072,8]
  243. # Setting Line Pitch
  244. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  245. CRT,RUN,EXT_MODE,0x00
  246. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  247. # Setting Engine Pitch
  248. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  249. CRT,RUN,MEM_CONFIG,0x09
  250. # Setting Basic Mode Registers.The registers
  251. # below are neither Desktop or Viewport Regs
  252. # Unlock Sequencer
  253. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  254. # Dump Sequencer Registers
  255. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  256. # Dump Graphics Controller Registers
  257. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  258. # Dump Attribute Controller Registers
  259. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  260. # Lock Sequencer
  261. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  262. DAC_IDR, RUN, DAC_OPERATION, 0x02
  263. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  264. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  265. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  266. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  267. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  268. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  269. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  270. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  271. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  272.  
  273. [1024,1536,8]
  274. # Setting Line Pitch
  275. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  276. CRT,RUN,EXT_MODE,0x00
  277. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  278. # Setting Engine Pitch
  279. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  280. CRT,RUN,MEM_CONFIG,0x09
  281. # Setting Basic Mode Registers.The registers
  282. # below are neither Desktop or Viewport Regs
  283. # Unlock Sequencer
  284. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  285. # Dump Sequencer Registers
  286. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  287. # Dump Graphics Controller Registers
  288. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  289. # Dump Attribute Controller Registers
  290. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  291. # Lock Sequencer
  292. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  293. DAC_IDR, RUN, DAC_OPERATION, 0x02
  294. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  295. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  296. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  297. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  298. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  299. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  300. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  301. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  302. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  303.  
  304. [1024,1536,16]
  305. # Setting Line Pitch
  306. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  307. CRT,RUN,EXT_MODE,0x00
  308. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  309. # Setting Engine Pitch
  310. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  311. CRT,RUN,MEM_CONFIG,0x89
  312. # Setting Basic Mode Registers.The registers
  313. # below are neither Desktop or Viewport Regs
  314. # Unlock Sequencer
  315. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  316. # Dump Sequencer Registers
  317. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  318. # Dump Graphics Controller Registers
  319. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  320. # Dump Attribute Controller Registers
  321. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  322. # Lock Sequencer
  323. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  324. DAC_IDR, RUN, DAC_OPERATION, 0x02
  325. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  326. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  327. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  328. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  329. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  330. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  331. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  332. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  333. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  334.  
  335. [1600,1200,16]
  336. # Setting Line Pitch
  337. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  338. CRT,RUN,EXT_MODE,0x00
  339. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  340. # Setting Engine Pitch
  341. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x91
  342. CRT,RUN,MEM_CONFIG,0x8b
  343. # Setting Basic Mode Registers.The registers
  344. # below are neither Desktop or Viewport Regs
  345. # Unlock Sequencer
  346. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  347. # Dump Sequencer Registers
  348. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  349. # Dump Graphics Controller Registers
  350. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  351. # Dump Attribute Controller Registers
  352. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  353. # Lock Sequencer
  354. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  355. DAC_IDR, RUN, DAC_OPERATION, 0x02
  356. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  357. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  358. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  359. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  360. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  361. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  362. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  363. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  364. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  365.  
  366. [1600,1200,8]
  367. # Setting Line Pitch
  368. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  369. CRT,RUN,EXT_MODE,0x00
  370. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  371. # Setting Engine Pitch
  372. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x81
  373. CRT,RUN,MEM_CONFIG,0x8b
  374. # Setting Basic Mode Registers.The registers
  375. # below are neither Desktop or Viewport Regs
  376. # Unlock Sequencer
  377. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  378. # Dump Sequencer Registers
  379. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  380. # Dump Graphics Controller Registers
  381. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  382. # Dump Attribute Controller Registers
  383. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  384. # Lock Sequencer
  385. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  386. DAC_IDR, RUN, DAC_OPERATION, 0x02
  387. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  388. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  389. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  390. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  391. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  392. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  393. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  394. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  395. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  396.  
  397. [1280,1024,24]
  398. # Setting Line Pitch
  399. CRT,RUN,LOGICAL_LINE_LENGTH,0xe0
  400. CRT,RUN,EXT_MODE,0x00
  401. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  402. # Setting Engine Pitch
  403. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xe0
  404. CRT,RUN,MEM_CONFIG,0x8b
  405. # Setting Basic Mode Registers.The registers
  406. # below are neither Desktop or Viewport Regs
  407. # Unlock Sequencer
  408. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  409. # Dump Sequencer Registers
  410. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  411. # Dump Graphics Controller Registers
  412. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  413. # Dump Attribute Controller Registers
  414. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  415. # Lock Sequencer
  416. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  417. DAC_IDR, RUN, DAC_OPERATION, 0x02
  418. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  419. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  420. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  421. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  422. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  423. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  424. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  425. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  426. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  427.  
  428. [1280,1024,16]
  429. # Setting Line Pitch
  430. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  431. CRT,RUN,EXT_MODE,0x00
  432. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  433. # Setting Engine Pitch
  434. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xd0
  435. CRT,RUN,MEM_CONFIG,0x8b
  436. # Setting Basic Mode Registers.The registers
  437. # below are neither Desktop or Viewport Regs
  438. # Unlock Sequencer
  439. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  440. # Dump Sequencer Registers
  441. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  442. # Dump Graphics Controller Registers
  443. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  444. # Dump Attribute Controller Registers
  445. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  446. # Lock Sequencer
  447. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  448. DAC_IDR, RUN, DAC_OPERATION, 0x02
  449. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  450. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  451. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  452. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  453. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  454. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  455. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  456. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  457. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  458.  
  459. [1280,1024,8]
  460. # Setting Line Pitch
  461. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  462. CRT,RUN,EXT_MODE,0x00
  463. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  464. # Setting Engine Pitch
  465. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xc0
  466. CRT,RUN,MEM_CONFIG,0x0b
  467. # Setting Basic Mode Registers.The registers
  468. # below are neither Desktop or Viewport Regs
  469. # Unlock Sequencer
  470. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  471. # Dump Sequencer Registers
  472. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  473. # Dump Graphics Controller Registers
  474. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  475. # Dump Attribute Controller Registers
  476. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  477. # Lock Sequencer
  478. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  479. DAC_IDR, RUN, DAC_OPERATION, 0x02
  480. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  481. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  482. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  483. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  484. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  485. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  486. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  487. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  488. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  489.  
  490. [1152,864,32]
  491. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  492. CRT,RUN,EXT_MODE,0x00
  493. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x20
  494. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x31
  495. CRT,RUN,MEM_CONFIG,0x89
  496. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  497. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  498. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  499. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  500. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  501. DAC_IDR, RUN, DAC_OPERATION, 0x02
  502. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  503. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  504. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  505. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  506. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  507. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  508. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  509. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  510. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  511.  
  512. [1152,864,24]
  513. # Setting Line Pitch
  514. CRT,RUN,LOGICAL_LINE_LENGTH,0xb0
  515. CRT,RUN,EXT_MODE,0x00
  516. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  517. # Setting Engine Pitch
  518. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x21
  519. CRT,RUN,MEM_CONFIG,0x8b
  520. # Setting Basic Mode Registers.The registers
  521. # below are neither Desktop or Viewport Regs
  522. # Unlock Sequencer
  523. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  524. # Dump Sequencer Registers
  525. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  526. # Dump Graphics Controller Registers
  527. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  528. # Dump Attribute Controller Registers
  529. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  530. # Lock Sequencer
  531. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  532. DAC_IDR, RUN, DAC_OPERATION, 0x02
  533. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  534. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  535. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  536. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  537. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  538. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  539. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  540. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  541. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  542.  
  543. [1152,864,16]
  544. # Setting Line Pitch
  545. CRT,RUN,LOGICAL_LINE_LENGTH,0x20
  546. CRT,RUN,EXT_MODE,0x00
  547. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  548. # Setting Engine Pitch
  549. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x11
  550. CRT,RUN,MEM_CONFIG,0x8b
  551. # Setting Basic Mode Registers.The registers
  552. # below are neither Desktop or Viewport Regs
  553. # Unlock Sequencer
  554. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  555. # Dump Sequencer Registers
  556. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  557. # Dump Graphics Controller Registers
  558. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  559. # Dump Attribute Controller Registers
  560. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  561. # Lock Sequencer
  562. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  563. DAC_IDR, RUN, DAC_OPERATION, 0x02
  564. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  565. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  566. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  567. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  568. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  569. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  570. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  571. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  572. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  573.  
  574. [1152,864,8]
  575. # Setting Line Pitch
  576. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  577. CRT,RUN,EXT_MODE,0x00
  578. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  579. # Setting Engine Pitch
  580. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x01
  581. CRT,RUN,MEM_CONFIG,0x89
  582. # Setting Basic Mode Registers.The registers
  583. # below are neither Desktop or Viewport Regs
  584. # Unlock Sequencer
  585. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  586. # Dump Sequencer Registers
  587. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  588. # Dump Graphics Controller Registers
  589. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  590. # Dump Attribute Controller Registers
  591. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  592. # Lock Sequencer
  593. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  594. DAC_IDR, RUN, DAC_OPERATION, 0x02
  595. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  596. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  597. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  598. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  599. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  600. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  601. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  602. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  603. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  604.  
  605. [1024,768,32]
  606. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  607. CRT,RUN,EXT_MODE,0x00
  608. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x20
  609. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x30
  610. CRT,RUN,MEM_CONFIG,0x89
  611. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  612. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  613. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  614. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  615. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  616. DAC_IDR, RUN, DAC_OPERATION, 0x02
  617. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  618. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  619. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  620. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  621. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  622. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  623. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  624. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  625. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  626.  
  627. [1024,768,24]
  628. # Setting Line Pitch
  629. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  630. CRT,RUN,EXT_MODE,0x00
  631. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  632. # Setting Engine Pitch
  633. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x20
  634. CRT,RUN,MEM_CONFIG,0x89
  635. # Setting Basic Mode Registers.The registers
  636. # below are neither Desktop or Viewport Regs
  637. # Unlock Sequencer
  638. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  639. # Dump Sequencer Registers
  640. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  641. # Dump Graphics Controller Registers
  642. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  643. # Dump Attribute Controller Registers
  644. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  645. # Lock Sequencer
  646. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  647. DAC_IDR, RUN, DAC_OPERATION, 0x02
  648. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  649. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  650. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  651. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  652. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  653. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  654. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  655. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  656. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  657.  
  658. [1024,768,16]
  659. # Setting Line Pitch
  660. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  661. CRT,RUN,EXT_MODE,0x00
  662. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  663. # Setting Engine Pitch
  664. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  665. CRT,RUN,MEM_CONFIG,0x89
  666. # Setting Basic Mode Registers.The registers
  667. # below are neither Desktop or Viewport Regs
  668. # Unlock Sequencer
  669. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  670. # Dump Sequencer Registers
  671. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  672. # Dump Graphics Controller Registers
  673. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  674. # Dump Attribute Controller Registers
  675. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  676. # Lock Sequencer
  677. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  678. DAC_IDR, RUN, DAC_OPERATION, 0x02
  679. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  680. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  681. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  682. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  683. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  684. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  685. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  686. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  687. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  688.  
  689. [1024,768,8]
  690. # Setting Line Pitch
  691. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  692. CRT,RUN,EXT_MODE,0x00
  693. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  694. # Setting Engine Pitch
  695. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  696. CRT,RUN,MEM_CONFIG,0x09
  697. # Setting Basic Mode Registers.The registers
  698. # below are neither Desktop or Viewport Regs
  699. # Unlock Sequencer
  700. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  701. # Dump Sequencer Registers
  702. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  703. # Dump Graphics Controller Registers
  704. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  705. # Dump Attribute Controller Registers
  706. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  707. # Lock Sequencer
  708. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  709. DAC_IDR, RUN, DAC_OPERATION, 0x02
  710. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  711. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  712. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  713. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  714. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  715. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  716. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  717. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  718. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  719.  
  720. [800,600,32]
  721. # Setting Line Pitch
  722. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  723. CRT,RUN,EXT_MODE,0x00
  724. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  725. # Setting Engine Pitch
  726. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xb0
  727. CRT,RUN,MEM_CONFIG,0x8b
  728. # Setting Basic Mode Registers.The registers
  729. # below are neither Desktop or Viewport Regs
  730. # Unlock Sequencer
  731. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  732. # Dump Sequencer Registers
  733. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  734. # Dump Graphics Controller Registers
  735. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  736. # Dump Attribute Controller Registers
  737. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  738. # Lock Sequencer
  739. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  740. DAC_IDR, RUN, DAC_OPERATION, 0x02
  741. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  742. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  743. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  744. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  745. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  746. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  747. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  748. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  749. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  750.  
  751. [800,600,24]
  752. # Setting Line Pitch
  753. CRT,RUN,LOGICAL_LINE_LENGTH,0x2c
  754. CRT,RUN,EXT_MODE,0x00
  755. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  756. # Setting Engine Pitch
  757. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xa0
  758. CRT,RUN,MEM_CONFIG,0x8b
  759. # Setting Basic Mode Registers.The registers
  760. # below are neither Desktop or Viewport Regs
  761. # Unlock Sequencer
  762. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  763. # Dump Sequencer Registers
  764. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  765. # Dump Graphics Controller Registers
  766. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  767. # Dump Attribute Controller Registers
  768. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  769. # Lock Sequencer
  770. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  771. DAC_IDR, RUN, DAC_OPERATION, 0x02
  772. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  773. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  774. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  775. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  776. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  777. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  778. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  779. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  780. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  781.  
  782. [800,600,16]
  783. # Setting Line Pitch
  784. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  785. CRT,RUN,EXT_MODE,0x00
  786. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  787. # Setting Engine Pitch
  788. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x90
  789. CRT,RUN,MEM_CONFIG,0x8b
  790. # Setting Basic Mode Registers.The registers
  791. # below are neither Desktop or Viewport Regs
  792. # Unlock Sequencer
  793. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  794. # Dump Sequencer Registers
  795. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  796. # Dump Graphics Controller Registers
  797. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  798. # Dump Attribute Controller Registers
  799. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  800. # Lock Sequencer
  801. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  802. DAC_IDR, RUN, DAC_OPERATION, 0x02
  803. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  804. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  805. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  806. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  807. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  808. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  809. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  810. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  811. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  812.  
  813. [800,600,8]
  814. # Setting Line Pitch
  815. CRT,RUN,LOGICAL_LINE_LENGTH,0x64
  816. CRT,RUN,EXT_MODE,0x00
  817. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  818. # Setting Engine Pitch
  819. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x80
  820. CRT,RUN,MEM_CONFIG,0x8b
  821. # Setting Basic Mode Registers.The registers
  822. # below are neither Desktop or Viewport Regs
  823. # Unlock Sequencer
  824. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  825. # Dump Sequencer Registers
  826. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  827. # Dump Graphics Controller Registers
  828. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  829. # Dump Attribute Controller Registers
  830. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  831. # Lock Sequencer
  832. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  833. DAC_IDR, RUN, DAC_OPERATION, 0x02
  834. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  835. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  836. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  837. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  838. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  839. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  840. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  841. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  842. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  843.  
  844. [640,480,32]
  845. # Setting Line Pitch
  846. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  847. CRT,RUN,EXT_MODE,0x00
  848. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  849. # Setting Engine Pitch
  850. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x70
  851. CRT,RUN,MEM_CONFIG,0x8b
  852. # Setting Basic Mode Registers.The registers
  853. # below are neither Desktop or Viewport Regs
  854. # Unlock Sequencer
  855. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  856. # Dump Sequencer Registers
  857. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  858. # Dump Graphics Controller Registers
  859. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  860. # Dump Attribute Controller Registers
  861. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  862. # Lock Sequencer
  863. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  864. DAC_IDR, RUN, DAC_OPERATION, 0x02
  865. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  866. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  867. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  868. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  869. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  870. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  871. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  872. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  873. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  874.  
  875. [640,480,24]
  876. # Setting Line Pitch
  877. CRT,RUN,LOGICAL_LINE_LENGTH,0xf0
  878. CRT,RUN,EXT_MODE,0x00
  879. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  880. # Setting Engine Pitch
  881. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x60
  882. CRT,RUN,MEM_CONFIG,0x8b
  883. # Setting Basic Mode Registers.The registers
  884. # below are neither Desktop or Viewport Regs
  885. # Unlock Sequencer
  886. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  887. # Dump Sequencer Registers
  888. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  889. # Dump Graphics Controller Registers
  890. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  891. # Dump Attribute Controller Registers
  892. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  893. # Lock Sequencer
  894. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  895. DAC_IDR, RUN, DAC_OPERATION, 0x02
  896. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  897. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  898. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  899. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  900. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  901. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  902. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  903. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  904. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  905.  
  906.  
  907.  
  908. [640,480,16]
  909. # Setting Line Pitch
  910. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  911. CRT,RUN,EXT_MODE,0x00
  912. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  913. # Setting Engine Pitch
  914. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x50
  915. CRT,RUN,MEM_CONFIG,0x8b
  916. # Setting Basic Mode Registers.The registers
  917. # below are neither Desktop or Viewport Regs
  918. # Unlock Sequencer
  919. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  920. # Dump Sequencer Registers
  921. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  922. # Dump Graphics Controller Registers
  923. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  924. # Dump Attribute Controller Registers
  925. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  926. # Lock Sequencer
  927. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  928. DAC_IDR, RUN, DAC_OPERATION, 0x02
  929. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  930. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  931. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  932. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  933. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  934. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  935. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  936. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  937. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  938.  
  939. [640,480,8]
  940. # Setting Line Pitch
  941. CRT,RUN,LOGICAL_LINE_LENGTH,0x50
  942. CRT,RUN,EXT_MODE,0x00
  943. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  944. # Setting Engine Pitch
  945. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x40
  946. CRT,RUN,MEM_CONFIG,0x8b
  947. # Setting Basic Mode Registers.The registers
  948. # below are neither Desktop or Viewport Regs
  949. # Unlock Sequencer
  950. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  951. # Dump Sequencer Registers
  952. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  953. # Dump Graphics Controller Registers
  954. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  955. # Dump Attribute Controller Registers
  956. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  957. # Lock Sequencer
  958. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  959. DAC_IDR, RUN, DAC_OPERATION, 0x02
  960. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  961. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  962. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  963. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  964. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  965. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  966. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  967. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  968. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  969.  
  970.  
  971. [1600,1200,16,82,66]
  972. # Unlock CRTC
  973. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  974. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  975. CRT,RUN,REG_LOCK_1,0x48,0xa5
  976. # Dump CRT Controller Registers
  977. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  978. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  979. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  980. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  981. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  982. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  983. CRT,RUN,MODE_CONTROL,0x02
  984. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  985. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  986. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  987. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  988. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  989. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  990. CRT,RUN,EXT_MISC_CONTROL_3,0x04
  991. # Lock CRTC Reg 11 for compatibility
  992. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  993. # Dump ENG Register
  994. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  995. # Dump MISCOUT Register
  996. DIR,RUN,MISC_WRITE,0xef
  997. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  998. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  999. CLK_IND, RUN, FREQ_2, 0xd3
  1000. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1001. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1002. CRT,RUN,LATCH_DATA, 0x00
  1003.  
  1004. [1600,1200,16,75,60]
  1005. # Unlock CRTC
  1006. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1007. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1008. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1009. # Dump CRT Controller Registers
  1010. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  1011. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1012. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1013. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1014. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1015. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  1016. CRT,RUN,MODE_CONTROL,0x02
  1017. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1018. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1019. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1020. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1021. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1022. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1023. CRT,RUN,EXT_MISC_CONTROL_3,0x04
  1024. # Lock CRTC Reg 11 for compatibility
  1025. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1026. # Dump ENG Register
  1027. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1028. # Dump MISCOUT Register
  1029. DIR,RUN,MISC_WRITE,0xef
  1030. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1031. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1032. CLK_IND, RUN, FREQ_2, 0xcd
  1033. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1034. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1035. CRT,RUN,LATCH_DATA, 0x00
  1036.  
  1037.  
  1038. [1600,1200,8,82,66]
  1039. # Unlock CRTC
  1040. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1041. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1042. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1043. # Dump CRT Controller Registers
  1044. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  1045. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1046. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1047. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1048. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1049. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  1050. CRT,RUN,MODE_CONTROL,0x02
  1051. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1052. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1053. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1054. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1055. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1056. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1057. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  1058. # Lock CRTC Reg 11 for compatibility
  1059. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1060. # Dump ENG Register
  1061. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1062. # Dump MISCOUT Register
  1063. DIR,RUN,MISC_WRITE,0xef
  1064. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1065. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1066. CLK_IND, RUN, FREQ_2, 0xd3
  1067. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1068. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1069. CRT,RUN,LATCH_DATA, 0x08
  1070.  
  1071. [1600,1200,8,75,60]
  1072. # Unlock CRTC
  1073. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1074. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1075. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1076. # Dump CRT Controller Registers
  1077. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  1078. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1079. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  1080. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  1081. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  1082. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  1083. CRT,RUN,MODE_CONTROL,0x02
  1084. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1085. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1086. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1087. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  1088. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1089. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1090. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  1091. # Lock CRTC Reg 11 for compatibility
  1092. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1093. # Dump ENG Register
  1094. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1095. # Dump MISCOUT Register
  1096. DIR,RUN,MISC_WRITE,0xef
  1097. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1098. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1099. CLK_IND, RUN, FREQ_2, 0xcd
  1100. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1101. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1102. CRT,RUN,LATCH_DATA, 0x08
  1103.  
  1104. [1280,1024,24,79,75]
  1105. # Unlock CRTC
  1106. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1107. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1108. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1109. # Dump CRT Controller Registers
  1110. CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x7b,0x03,0x29,0x42,0x00,0x40
  1111. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1112. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1113. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x03,0xe3,0xff
  1114. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1115. CRT,RUN,MISC_1,0x15,0x94,0x28,0x11
  1116. CRT,RUN,MODE_CONTROL,0x02
  1117. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1118. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1119. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1120. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1121. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1122. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1123. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1124. # Lock CRTC Reg 11 for compatibility
  1125. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1126. # Dump ENG Register
  1127. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1128. # Dump MISCOUT Register
  1129. DIR,RUN,MISC_WRITE,0xef
  1130. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1131. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1132. CLK_IND, RUN, FREQ_2, 0xc1
  1133. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1134. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1135. CRT,RUN,LATCH_DATA, 0x00
  1136.  
  1137. [1280,1024,24,76,72]
  1138. # Unlock CRTC
  1139. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1140. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1141. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1142. # Dump CRT Controller Registers
  1143. CRT,RUN,HORZ_TOTAL,0xa0,0x77,0x78,0x84,0x7c,0x04,0x2c,0x42,0x00,0x40
  1144. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1145. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1146. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x06,0xe3,0xff
  1147. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1148. CRT,RUN,MISC_1,0x15,0x9a,0x28,0x11
  1149. CRT,RUN,MODE_CONTROL,0x02
  1150. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1151. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1152. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1153. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1154. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1155. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1156. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1157. # Lock CRTC Reg 11 for compatibility
  1158. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1159. # Dump ENG Register
  1160. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1161. # Dump MISCOUT Register
  1162. DIR,RUN,MISC_WRITE,0xef
  1163. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1164. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1165. CLK_IND, RUN, FREQ_2, 0xc1
  1166. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1167. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1168. CRT,RUN,LATCH_DATA, 0x00
  1169.  
  1170. [1280,1024,24,74,70]
  1171. # Unlock CRTC
  1172. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1173. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1174. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1175. # Dump CRT Controller Registers
  1176. CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x80,0x0a,0x28,0x52,0x00,0x40
  1177. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1178. CRT,RUN,VERT_RETRACE_START,0x00,0x05,0xff
  1179. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1180. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1181. CRT,RUN,MISC_1,0x15,0x94,0x28,0x11
  1182. CRT,RUN,MODE_CONTROL,0x02
  1183. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1184. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1185. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1186. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1187. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1188. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1189. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1190. # Lock CRTC Reg 11 for compatibility
  1191. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1192. # Dump ENG Register
  1193. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1194. # Dump MISCOUT Register
  1195. DIR,RUN,MISC_WRITE,0xef
  1196. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1197. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1198. CLK_IND, RUN, FREQ_2, 0xba
  1199. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1200. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1201. CRT,RUN,LATCH_DATA, 0x00
  1202.  
  1203. [1280,1024,24,64,60]
  1204. # Unlock CRTC
  1205. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1206. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1207. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1208. # Dump CRT Controller Registers
  1209. ##CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x7d,0x05,0x34,0x42,0x00,0x40
  1210. CRT,RUN,HORZ_TOTAL,0x9a,0x77,0x78,0x9e,0x7d,0x08,0x28,0x52,0x00,0x40
  1211. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1212. ##CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1213. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1214. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1215. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1216. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1217. CRT,RUN,MISC_1,0x15,0x95,0x28,0x11
  1218. CRT,RUN,MODE_CONTROL,0x02
  1219. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1220. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1221. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1222. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1223. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1224. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1225. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1226. # Lock CRTC Reg 11 for compatibility
  1227. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1228. # Dump ENG Register
  1229. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1230. # Dump MISCOUT Register
  1231. DIR,RUN,MISC_WRITE,0xef
  1232. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1233. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1234. ##CLK_IND, RUN, FREQ_2, 0xab
  1235. CLK_IND, RUN, FREQ_2, 0xa9
  1236. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1237. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1238. CRT,RUN,LATCH_DATA, 0x00
  1239.  
  1240. [1280,1024,16,95,90]
  1241. # Unlock CRTC
  1242. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1243. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1244. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1245. # Dump CRT Controller Registers
  1246. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x52,0x9a,0x2a,0x42,0x00,0x40
  1247. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1248. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  1249. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  1250. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1251. CRT,RUN,MISC_1,0x15,0x62,0x33,0x11
  1252. CRT,RUN,MODE_CONTROL,0x02
  1253. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1254. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1255. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1256. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1257. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1258. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1259. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1260. # Lock CRTC Reg 11 for compatibility
  1261. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1262. # Dump ENG Register
  1263. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1264. # Dump MISCOUT Register
  1265. DIR,RUN,MISC_WRITE,0xef
  1266. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1267. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1268. CLK_IND, RUN, FREQ_2, 0xd0
  1269. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1270. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1271. CRT,RUN,LATCH_DATA, 0x00
  1272.  
  1273. [1280,1024,16,79,75]
  1274. # Unlock CRTC
  1275. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1276. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1277. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1278. # Dump CRT Controller Registers
  1279. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x51,0x9a,0x2c,0x42,0x00,0x40
  1280. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1281. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1282. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  1283. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1284. CRT,RUN,MISC_1,0x15,0x5e,0x33,0x11
  1285. CRT,RUN,MODE_CONTROL,0x02
  1286. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1287. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1288. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1289. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1290. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1291. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1292. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1293. # Lock CRTC Reg 11 for compatibility
  1294. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1295. # Dump ENG Register
  1296. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1297. # Dump MISCOUT Register
  1298. DIR,RUN,MISC_WRITE,0xef
  1299. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1300. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1301. CLK_IND, RUN, FREQ_2, 0xc1
  1302. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1303. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1304. CRT,RUN,LATCH_DATA, 0x00
  1305.  
  1306. [1280,1024,16,76,72]
  1307. # Unlock CRTC
  1308. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1309. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1310. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1311. # Dump CRT Controller Registers
  1312. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x53,0x98,0x27,0x42,0x00,0x40
  1313. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1314. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  1315. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  1316. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1317. CRT,RUN,MISC_1,0x15,0x62,0x33,0x11
  1318. CRT,RUN,MODE_CONTROL,0x02
  1319. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1320. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1321. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1322. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1323. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1324. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1325. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1326. # Lock CRTC Reg 11 for compatibility
  1327. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1328. # Dump ENG Register
  1329. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1330. # Dump MISCOUT Register
  1331. DIR,RUN,MISC_WRITE,0xef
  1332. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1333. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1334. CLK_IND, RUN, FREQ_2, 0xc1
  1335. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1336. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1337. CRT,RUN,LATCH_DATA, 0x00
  1338.  
  1339. [1280,1024,16,74,70]
  1340. # Unlock CRTC
  1341. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1342. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1343. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1344. # Dump CRT Controller Registers
  1345. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x56,0x9d,0x28,0x52,0x00,0x40
  1346. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1347. CRT,RUN,VERT_RETRACE_START,0x00,0x05,0xff
  1348. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1349. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1350. CRT,RUN,MISC_1,0x15,0x60,0x33,0x11
  1351. CRT,RUN,MODE_CONTROL,0x02
  1352. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1353. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1354. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1355. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1356. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1357. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1358. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1359. # Lock CRTC Reg 11 for compatibility
  1360. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1361. # Dump ENG Register
  1362. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1363. # Dump MISCOUT Register
  1364. DIR,RUN,MISC_WRITE,0xef
  1365. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1366. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1367. CLK_IND, RUN, FREQ_2, 0xba
  1368. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1369. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1370. CRT,RUN,LATCH_DATA, 0x00
  1371.  
  1372. [1280,1024,16,64,60]
  1373. # Unlock CRTC
  1374. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1375. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1376. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1377. # Dump CRT Controller Registers
  1378. ##CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x53,0x98,0x33,0x42,0x00,0x40
  1379. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x53,0x9a,0x28,0x52,0x00,0x40
  1380. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1381. ##CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1382. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1383. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  1384. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1385. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1386. ##CRT,RUN,MISC_1,0x15,0x5f,0x33,0x11
  1387. CRT,RUN,MISC_1,0x15,0x60,0x33,0x11
  1388. CRT,RUN,MODE_CONTROL,0x02
  1389. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1390. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1391. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1392. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1393. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1394. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  1395. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1396. # Lock CRTC Reg 11 for compatibility
  1397. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1398. # Dump ENG Register
  1399. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1400. # Dump MISCOUT Register
  1401. DIR,RUN,MISC_WRITE,0xef
  1402. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1403. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1404. ##CLK_IND, RUN, FREQ_2, 0xab
  1405. CLK_IND, RUN, FREQ_2, 0xa9
  1406. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1407. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1408. CRT,RUN,LATCH_DATA, 0x00
  1409.  
  1410. [1280,1024,8,95,90]
  1411. # Unlock CRTC
  1412. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1413. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1414. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1415. # Dump CRT Controller Registers
  1416. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x56,0x9f,0x2a,0x42,0x00,0x40
  1417. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1418. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  1419. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  1420. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1421. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  1422. CRT,RUN,MODE_CONTROL,0x02
  1423. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1424. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1425. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1426. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1427. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1428. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1429. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1430. # Lock CRTC Reg 11 for compatibility
  1431. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1432. # Dump ENG Register
  1433. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1434. # Dump MISCOUT Register
  1435. DIR,RUN,MISC_WRITE,0xef
  1436. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1437. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1438. CLK_IND, RUN, FREQ_2, 0xd0
  1439. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1440. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1441. CRT,RUN,LATCH_DATA, 0x08
  1442.  
  1443. [1280,1024,8,79,75]
  1444. # Unlock CRTC
  1445. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1446. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1447. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1448. # Dump CRT Controller Registers
  1449. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x54,0x9f,0x2c,0x42,0x00,0x40
  1450. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1451. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1452. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  1453. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1454. CRT,RUN,MISC_1,0x15,0x5e,0x14,0x11
  1455. CRT,RUN,MODE_CONTROL,0x02
  1456. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1457. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1458. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1459. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1460. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1461. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1462. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1463. # Lock CRTC Reg 11 for compatibility
  1464. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1465. # Dump ENG Register
  1466. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1467. # Dump MISCOUT Register
  1468. DIR,RUN,MISC_WRITE,0xef
  1469. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1470. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1471. CLK_IND, RUN, FREQ_2, 0xc1
  1472. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1473. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1474. CRT,RUN,LATCH_DATA, 0x08
  1475.  
  1476. [1280,1024,8,76,72]
  1477. # Unlock CRTC
  1478. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1479. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1480. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1481. # Dump CRT Controller Registers
  1482. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x57,0x9c,0x27,0x42,0x00,0x40
  1483. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1484. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  1485. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  1486. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1487. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  1488. CRT,RUN,MODE_CONTROL,0x02
  1489. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1490. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1491. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1492. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1493. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1494. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1495. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1496. # Lock CRTC Reg 11 for compatibility
  1497. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1498. # Dump ENG Register
  1499. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1500. # Dump MISCOUT Register
  1501. DIR,RUN,MISC_WRITE,0xef
  1502. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1503. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1504. CLK_IND, RUN, FREQ_2, 0xc1
  1505. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1506. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1507. CRT,RUN,LATCH_DATA, 0x08
  1508.  
  1509. [1280,1024,8,74,70]
  1510. # Unlock CRTC
  1511. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1512. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1513. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1514. # Dump CRT Controller Registers
  1515. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x5a,0x81,0x28,0x52,0x00,0x40
  1516. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1517. CRT,RUN,VERT_RETRACE_START,0x00,0x05,0xff
  1518. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1519. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1520. CRT,RUN,MISC_1,0x15,0x60,0x14,0x11
  1521. CRT,RUN,MODE_CONTROL,0x02
  1522. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1523. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1524. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1525. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1526. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1527. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1528. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1529. # Lock CRTC Reg 11 for compatibility
  1530. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1531. # Dump ENG Register
  1532. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1533. # Dump MISCOUT Register
  1534. DIR,RUN,MISC_WRITE,0xef
  1535. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1536. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1537. CLK_IND, RUN, FREQ_2, 0xba
  1538. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1539. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1540. CRT,RUN,LATCH_DATA, 0x08
  1541.  
  1542. [1280,1024,8,64,60]
  1543. # Unlock CRTC
  1544. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1545. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1546. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1547. # Dump CRT Controller Registers
  1548. ##CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x57,0x9c,0x33,0x42,0x00,0x40
  1549. CRT,RUN,HORZ_TOTAL,0x65,0x4f,0x50,0x8a,0x57,0x9e,0x28,0x52,0x00,0x40
  1550. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1551. ##CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  1552. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1553. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  1554. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x29,0xe3,0xff
  1555. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  1556. ##CRT,RUN,MISC_1,0x15,0x5f,0x14,0x11
  1557. CRT,RUN,MISC_1,0x15,0x60,0x14,0x11
  1558. CRT,RUN,MODE_CONTROL,0x02
  1559. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1560. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1561. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1562. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  1563. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1564. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  1565. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1566. # Lock CRTC Reg 11 for compatibility
  1567. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1568. # Dump ENG Register
  1569. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1570. # Dump MISCOUT Register
  1571. DIR,RUN,MISC_WRITE,0xef
  1572. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1573. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1574. ##CLK_IND, RUN, FREQ_2, 0xab
  1575. CLK_IND, RUN, FREQ_2, 0xa9
  1576. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1577. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1578. CRT,RUN,LATCH_DATA, 0x08
  1579.  
  1580. [1152,864,32,64,70]
  1581. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1582. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1583. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1584. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1585. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1586. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1587. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1588. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1589. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1590. CRT,RUN,MODE_CONTROL,0x02
  1591. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1592. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1593. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1594. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1595. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1596. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1597. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1598. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1599. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1600. DIR,RUN,MISC_WRITE,0x2f
  1601. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1602. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1603. CLK_IND, RUN, FREQ_2, 0x9b
  1604. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1605. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1606. CRT,RUN,LATCH_DATA, 0x00
  1607.  
  1608. [1152,864,32,56,60]
  1609. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1610. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1611. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1612. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1613. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1614. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1615. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1616. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1617. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1618. CRT,RUN,MODE_CONTROL,0x02
  1619. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1620. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1621. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1622. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1623. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1624. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1625. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1626. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1627. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1628. DIR,RUN,MISC_WRITE,0x2f
  1629. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1630. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1631. CLK_IND, RUN, FREQ_2, 0x90
  1632. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1633. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1634. CRT,RUN,LATCH_DATA, 0x00
  1635.  
  1636.  
  1637.  
  1638. [1152,864,24,64,70]
  1639. # Unlock CRTC
  1640. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1641. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1642. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1643. # Dump CRT Controller Registers
  1644. CRT,RUN,HORZ_TOTAL,0x85,0x6b,0x6c,0x89,0x6f,0x16,0x92,0xff,0x00,0x60
  1645. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1646. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1647. CRT,RUN,UNDERLINE_LOCATION,0x60,0x59,0x7d,0xeb,0xff
  1648. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x10,0x00
  1649. CRT,RUN,MISC_1,0x15,0x7f,0x9f,0x11
  1650. CRT,RUN,MODE_CONTROL,0x02
  1651. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1652. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1653. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1654. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1655. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1656. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  1657. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1658. # Lock CRTC Reg 11 for compatibility
  1659. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1660. # Dump ENG Register
  1661. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1662. # Dump MISCOUT Register
  1663. DIR,RUN,MISC_WRITE,0xef
  1664. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1665. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1666. CLK_IND, RUN, FREQ_2, 0x9b
  1667. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1668. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1669. CRT,RUN,LATCH_DATA, 0x00
  1670.  
  1671. [1152,864,24,56,60]
  1672. # Unlock CRTC
  1673. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1674. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1675. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1676. # Dump CRT Controller Registers
  1677. CRT,RUN,HORZ_TOTAL,0x85,0x6b,0x6c,0x89,0x6e,0x14,0xac,0xff,0x00,0x60
  1678. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1679. CRT,RUN,VERT_RETRACE_START,0x77,0x00,0x5f
  1680. CRT,RUN,UNDERLINE_LOCATION,0x60,0x59,0x99,0xeb,0xff
  1681. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  1682. CRT,RUN,MISC_1,0x15,0x7f,0x3d,0x11
  1683. CRT,RUN,MODE_CONTROL,0x02
  1684. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1685. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1686. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1687. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1688. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1689. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1690. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1691. # Lock CRTC Reg 11 for compatibility
  1692. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1693. # Dump ENG Register
  1694. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1695. # Dump MISCOUT Register
  1696. DIR,RUN,MISC_WRITE,0xef
  1697. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1698. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1699. CLK_IND, RUN, FREQ_2, 0x90
  1700. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1701. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1702. CRT,RUN,LATCH_DATA, 0x00
  1703.  
  1704. [1152,864,16,82,90]
  1705. # Unlock CRTC
  1706. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1707. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1708. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1709. # Dump CRT Controller Registers
  1710. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  1711. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1712. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1713. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1714. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1715. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1716. CRT,RUN,MODE_CONTROL,0x02
  1717. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1718. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1719. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1720. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1721. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1722. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1723. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1724. # Lock CRTC Reg 11 for compatibility
  1725. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1726. # Dump ENG Register
  1727. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1728. # Dump MISCOUT Register
  1729. DIR,RUN,MISC_WRITE,0xef
  1730. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1731. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1732. CLK_IND, RUN, FREQ_2, 0xb9
  1733. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1734. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1735. CRT,RUN,LATCH_DATA, 0x00
  1736.  
  1737. [1152,864,16,71,75]
  1738. # Unlock CRTC
  1739. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1740. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1741. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1742. # Dump CRT Controller Registers
  1743. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1744. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1745. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1746. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1747. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1748. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1749. CRT,RUN,MODE_CONTROL,0x02
  1750. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1751. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1752. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1753. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1754. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1755. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1756. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1757. # Lock CRTC Reg 11 for compatibility
  1758. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1759. # Dump ENG Register
  1760. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1761. # Dump MISCOUT Register
  1762. DIR,RUN,MISC_WRITE,0xef
  1763. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1764. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1765. CLK_IND, RUN, FREQ_2, 0xa9
  1766. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1767. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1768. CRT,RUN,LATCH_DATA, 0x00
  1769.  
  1770. [1152,864,16,64,70]
  1771. # Unlock CRTC
  1772. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1773. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1774. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1775. # Dump CRT Controller Registers
  1776. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1777. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1778. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1779. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1780. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1781. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1782. CRT,RUN,MODE_CONTROL,0x02
  1783. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1784. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1785. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1786. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1787. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1788. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1789. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1790. # Lock CRTC Reg 11 for compatibility
  1791. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1792. # Dump ENG Register
  1793. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1794. # Dump MISCOUT Register
  1795. DIR,RUN,MISC_WRITE,0xef
  1796. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1797. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1798. CLK_IND, RUN, FREQ_2, 0x9b
  1799. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1800. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1801. CRT,RUN,LATCH_DATA, 0x00
  1802.  
  1803. [1152,864,16,56,60]
  1804. # Unlock CRTC
  1805. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1806. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1807. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1808. # Dump CRT Controller Registers
  1809. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1810. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1811. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1812. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1813. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1814. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1815. CRT,RUN,MODE_CONTROL,0x02
  1816. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1817. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  1818. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1819. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1820. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1821. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1822. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1823. # Lock CRTC Reg 11 for compatibility
  1824. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1825. # Dump ENG Register
  1826. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1827. # Dump MISCOUT Register
  1828. DIR,RUN,MISC_WRITE,0xef
  1829. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1830. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1831. CLK_IND, RUN, FREQ_2, 0x90
  1832. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1833. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1834. CRT,RUN,LATCH_DATA, 0x00
  1835.  
  1836. [1152,864,8,82,90]
  1837. # Unlock CRTC
  1838. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1839. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1840. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1841. # Dump CRT Controller Registers
  1842. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4f,0x13,0x95,0xff,0x00,0x60
  1843. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1844. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1845. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1846. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1847. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1848. CRT,RUN,MODE_CONTROL,0x02
  1849. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1850. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1851. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1852. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1853. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1854. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1855. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1856. # Lock CRTC Reg 11 for compatibility
  1857. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1858. # Dump ENG Register
  1859. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1860. # Dump MISCOUT Register
  1861. DIR,RUN,MISC_WRITE,0xef
  1862. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1863. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1864. CLK_IND, RUN, FREQ_2, 0xb9
  1865. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1866. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1867. CRT,RUN,LATCH_DATA, 0x08
  1868.  
  1869. [1152,864,8,71,75]
  1870. # Unlock CRTC
  1871. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1872. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1873. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1874. # Dump CRT Controller Registers
  1875. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x50,0x14,0xb7,0xff,0x00,0x60
  1876. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1877. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1878. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1879. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1880. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1881. CRT,RUN,MODE_CONTROL,0x02
  1882. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1883. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1884. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1885. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1886. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1887. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1888. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1889. # Lock CRTC Reg 11 for compatibility
  1890. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1891. # Dump ENG Register
  1892. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1893. # Dump MISCOUT Register
  1894. DIR,RUN,MISC_WRITE,0xef
  1895. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1896. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1897. CLK_IND, RUN, FREQ_2, 0xa9
  1898. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1899. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1900. CRT,RUN,LATCH_DATA, 0x08
  1901.  
  1902. [1152,864,8,64,70]
  1903. # Unlock CRTC
  1904. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1905. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1906. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1907. # Dump CRT Controller Registers
  1908. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4f,0x14,0x92,0xff,0x00,0x60
  1909. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1910. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1911. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1912. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1913. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1914. CRT,RUN,MODE_CONTROL,0x02
  1915. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1916. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1917. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1918. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1919. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1920. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1921. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1922. # Lock CRTC Reg 11 for compatibility
  1923. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1924. # Dump ENG Register
  1925. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1926. # Dump MISCOUT Register
  1927. DIR,RUN,MISC_WRITE,0xef
  1928. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1929. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1930. CLK_IND, RUN, FREQ_2, 0x9b
  1931. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1932. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1933. CRT,RUN,LATCH_DATA, 0x08
  1934.  
  1935. [1152,864,8,56,60]
  1936. # Unlock CRTC
  1937. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1938. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1939. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1940. # Dump CRT Controller Registers
  1941. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x4e,0x12,0xac,0xff,0x00,0x60
  1942. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1943. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1944. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1945. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1946. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1947. CRT,RUN,MODE_CONTROL,0x02
  1948. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1949. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1950. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1951. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1952. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1953. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1954. CRT,RUN,EXT_MISC_CONTROL_3,0x77
  1955. # Lock CRTC Reg 11 for compatibility
  1956. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1957. # Dump ENG Register
  1958. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1959. # Dump MISCOUT Register
  1960. DIR,RUN,MISC_WRITE,0xef
  1961. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1962. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1963. CLK_IND, RUN, FREQ_2, 0x90
  1964. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1965. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1966. CRT,RUN,LATCH_DATA, 0x08
  1967.  
  1968.  
  1969. [1024,768,32,64,80]
  1970. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1971. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1972. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1973. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1974. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1975. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1976. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1977. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  1978. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1979. CRT,RUN,MODE_CONTROL,0x02
  1980. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1981. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  1982. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1983. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1984. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1985. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  1986. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1987. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1988. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1989. DIR,RUN,MISC_WRITE,0x2f
  1990. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1991. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1992. CLK_IND, RUN, FREQ_2, 0x93
  1993. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1994. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1995. CRT,RUN,LATCH_DATA, 0x00
  1996.  
  1997. [1024,768,32,60,75]
  1998. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1999. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2000. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2001. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  2002. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2003. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  2004. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  2005. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2006. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2007. CRT,RUN,MODE_CONTROL,0x02
  2008. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2009. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2010. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2011. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2012. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2013. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2014. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2015. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2016. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2017. DIR,RUN,MISC_WRITE,0x2f
  2018. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2019. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2020. CLK_IND, RUN, FREQ_2, 0x8c
  2021. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2022. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2023. CRT,RUN,LATCH_DATA, 0x00
  2024.  
  2025. [1024,768,32,58,72]
  2026. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2027. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2028. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2029. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  2030. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2031. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2032. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  2033. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2034. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  2035. CRT,RUN,MODE_CONTROL,0x02
  2036. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2037. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2038. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2039. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2040. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2041. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2042. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2043. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2044. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2045. DIR,RUN,MISC_WRITE,0x2f
  2046. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2047. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2048. CLK_IND, RUN, FREQ_2, 0x88
  2049. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2050. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2051. CRT,RUN,LATCH_DATA, 0x00
  2052.  
  2053. [1024,768,32,56,70]
  2054. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2055. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2056. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2057. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2058. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2059. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2060. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2061. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2062. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2063. CRT,RUN,MODE_CONTROL,0x02
  2064. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2065. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2066. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2067. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2068. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2069. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2070. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2071. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2072. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2073. DIR,RUN,MISC_WRITE,0x2f
  2074. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2075. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2076. CLK_IND, RUN, FREQ_2, 0x88
  2077. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2078. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2079. CRT,RUN,LATCH_DATA, 0x00
  2080.  
  2081. [1024,768,32,48,60]
  2082. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2083. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2084. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2085. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2086. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2087. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2088. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2089. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2090. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  2091. CRT,RUN,MODE_CONTROL,0x02
  2092. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2093. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2094. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2095. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2096. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2097. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xbe,0x00,0x00
  2098. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2099. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2100. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2101. DIR,RUN,MISC_WRITE,0x2f
  2102. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2103. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2104. CLK_IND, RUN, FREQ_2, 0x7e
  2105. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2106. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2107. CRT,RUN,LATCH_DATA, 0x00
  2108.  
  2109. [1024,768,24,64,80]
  2110. # Unlock CRTC
  2111. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2112. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2113. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2114. # Dump CRT Controller Registers
  2115. CRT,RUN,HORZ_TOTAL,0x79,0x5f,0x60,0x9d,0x68,0x91,0x1f,0xf5,0x00,0x60
  2116. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2117. CRT,RUN,VERT_RETRACE_START,0x00,0x0e,0xff
  2118. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1b,0xeb,0xff
  2119. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2120. CRT,RUN,MISC_1,0x15,0x70,0x3d,0x11
  2121. CRT,RUN,MODE_CONTROL,0x02
  2122. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2123. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2124. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2125. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2126. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2127. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2128. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2129. # Lock CRTC Reg 11 for compatibility
  2130. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2131. # Dump ENG Register
  2132. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2133. # Dump MISCOUT Register
  2134. DIR,RUN,MISC_WRITE,0xef
  2135. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2136. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2137. CLK_IND, RUN, FREQ_2, 0x93
  2138. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2139. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2140. CRT,RUN,LATCH_DATA, 0x00
  2141.  
  2142. [1024,768,24,60,75]
  2143. # Unlock CRTC
  2144. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2145. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2146. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2147. # Dump CRT Controller Registers
  2148. CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x99,0x62,0x8f,0x1e,0xf1,0x00,0x60
  2149. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2150. CRT,RUN,VERT_RETRACE_START,0xff,0x05,0xff
  2151. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xeb,0xff
  2152. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2153. CRT,RUN,MISC_1,0x15,0x70,0x21,0x11
  2154. CRT,RUN,MODE_CONTROL,0x02
  2155. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2156. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2157. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2158. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2159. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2160. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2161. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2162. # Lock CRTC Reg 11 for compatibility
  2163. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2164. # Dump ENG Register
  2165. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2166. # Dump MISCOUT Register
  2167. DIR,RUN,MISC_WRITE,0xef
  2168. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2169. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2170. CLK_IND, RUN, FREQ_2, 0x8c
  2171. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2172. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2173. CRT,RUN,LATCH_DATA, 0x00
  2174.  
  2175.  
  2176. [1024,768,24,58,72]
  2177. # Unlock CRTC
  2178. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2179. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2180. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2181. # Dump CRT Controller Registers
  2182. CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x9a,0x63,0x8c,0x19,0xf5,0x00,0x60
  2183. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2184. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2185. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x11,0xeb,0xff
  2186. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2187. CRT,RUN,MISC_1,0x15,0x70,0x21,0x11
  2188. CRT,RUN,MODE_CONTROL,0x02
  2189. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2190. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2191. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2192. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2193. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2194. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2195. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2196. # Lock CRTC Reg 11 for compatibility
  2197. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2198. # Dump ENG Register
  2199. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2200. # Dump MISCOUT Register
  2201. DIR,RUN,MISC_WRITE,0xef
  2202. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2203. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2204. CLK_IND, RUN, FREQ_2, 0x88
  2205. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2206. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2207. CRT,RUN,LATCH_DATA, 0x00
  2208.  
  2209. [1024,768,24,56,70]
  2210. # Unlock CRTC
  2211. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2212. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2213. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2214. # Dump CRT Controller Registers
  2215. ##CRT,RUN,HORZ_TOTAL,0x76,0x5f,0x60,0x1b,0x61,0x8e,0x2a,0xf5,0x00,0x60
  2216. CRT,RUN,HORZ_TOTAL,0x79,0x5f,0x60,0x9d,0x63,0x90,0x24,0xfd,0x00,0x60
  2217. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2218. ##CRT,RUN,VERT_RETRACE_START,0x03,0x09,0xff
  2219. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2220. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x2a,0xeb,0xff
  2221. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x25,0xeb,0xff
  2222. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2223. ##CRT,RUN,MISC_1,0x15,0x71,0x21,0x11
  2224. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  2225. CRT,RUN,MODE_CONTROL,0x02
  2226. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2227. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2228. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2229. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2230. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2231. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2232. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2233. # Lock CRTC Reg 11 for compatibility
  2234. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2235. # Dump ENG Register
  2236. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2237. # Dump MISCOUT Register
  2238. DIR,RUN,MISC_WRITE,0xef
  2239. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2240. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2241. ##CLK_IND, RUN, FREQ_2, 0x88
  2242. CLK_IND, RUN, FREQ_2, 0x89
  2243. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2244. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2245. CRT,RUN,LATCH_DATA, 0x00
  2246.  
  2247. [1024,768,24,48,60]
  2248. # Unlock CRTC
  2249. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2250. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2251. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2252. # Dump CRT Controller Registers
  2253. CRT,RUN,HORZ_TOTAL,0x79,0x5f,0x60,0x9d,0x62,0x8f,0x24,0xf5,0x00,0x60
  2254. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2255. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2256. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xeb,0xff
  2257. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x14,0x00
  2258. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  2259. CRT,RUN,MODE_CONTROL,0x02
  2260. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2261. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2262. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2263. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2264. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2265. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2266. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2267. # Lock CRTC Reg 11 for compatibility
  2268. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2269. # Dump ENG Register
  2270. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2271. # Dump MISCOUT Register
  2272. DIR,RUN,MISC_WRITE,0xef
  2273. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2274. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2275. CLK_IND, RUN, FREQ_2, 0x7e
  2276. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2277. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2278. CRT,RUN,LATCH_DATA, 0x00
  2279.  
  2280. [1024,768,16,96,120]
  2281. # Unlock CRTC
  2282. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2283. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2284. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2285. # Dump CRT Controller Registers
  2286. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  2287. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2288. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  2289. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2290. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2291. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  2292. CRT,RUN,MODE_CONTROL,0x02
  2293. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2294. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2295. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2296. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2297. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2298. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2299. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2300. # Lock CRTC Reg 11 for compatibility
  2301. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2302. # Dump ENG Register
  2303. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2304. # Dump MISCOUT Register
  2305. DIR,RUN,MISC_WRITE,0xef
  2306. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2307. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2308. CLK_IND, RUN, FREQ_2, 0xbd
  2309. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2310. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2311. CRT,RUN,LATCH_DATA, 0x00
  2312.  
  2313. [1024,768,16,81,100]
  2314. # Unlock CRTC
  2315. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2316. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2317. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2318. # Dump CRT Controller Registers
  2319. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  2320. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2321. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  2322. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2323. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2324. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  2325. CRT,RUN,MODE_CONTROL,0x02
  2326. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2327. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2328. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2329. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2330. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2331. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2332. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2333. # Lock CRTC Reg 11 for compatibility
  2334. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2335. # Dump ENG Register
  2336. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2337. # Dump MISCOUT Register
  2338. DIR,RUN,MISC_WRITE,0xef
  2339. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2340. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2341. CLK_IND, RUN, FREQ_2, 0xa9
  2342. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2343. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2344. CRT,RUN,LATCH_DATA, 0x00
  2345.  
  2346. [1024,768,16,64,80]
  2347. # Unlock CRTC
  2348. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2349. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2350. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2351. # Dump CRT Controller Registers
  2352. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  2353. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2354. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  2355. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2356. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2357. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2358. CRT,RUN,MODE_CONTROL,0x02
  2359. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2360. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2361. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2362. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2363. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2364. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2365. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2366. # Lock CRTC Reg 11 for compatibility
  2367. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2368. # Dump ENG Register
  2369. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2370. # Dump MISCOUT Register
  2371. DIR,RUN,MISC_WRITE,0xef
  2372. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2373. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2374. CLK_IND, RUN, FREQ_2, 0x93
  2375. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2376. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2377. CRT,RUN,LATCH_DATA, 0x00
  2378.  
  2379. [1024,768,16,60,75]
  2380. # Unlock CRTC
  2381. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2382. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2383. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2384. # Dump CRT Controller Registers
  2385. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  2386. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2387. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  2388. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  2389. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2390. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2391. CRT,RUN,MODE_CONTROL,0x02
  2392. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2393. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2394. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2395. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2396. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2397. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2398. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2399. # Lock CRTC Reg 11 for compatibility
  2400. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2401. # Dump ENG Register
  2402. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2403. # Dump MISCOUT Register
  2404. DIR,RUN,MISC_WRITE,0xef
  2405. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2406. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2407. CLK_IND, RUN, FREQ_2, 0x8c
  2408. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2409. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2410. CRT,RUN,LATCH_DATA, 0x00
  2411.  
  2412. [1024,768,16,58,72]
  2413. # Unlock CRTC
  2414. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2415. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2416. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2417. # Dump CRT Controller Registers
  2418. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  2419. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2420. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2421. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  2422. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2423. CRT,RUN,MISC_1,0x15,0x45,0x20,0x11
  2424. CRT,RUN,MODE_CONTROL,0x02
  2425. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2426. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2427. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2428. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2429. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2430. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2431. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2432. # Lock CRTC Reg 11 for compatibility
  2433. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2434. # Dump ENG Register
  2435. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2436. # Dump MISCOUT Register
  2437. DIR,RUN,MISC_WRITE,0xef
  2438. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2439. CLK_IND, RUN, FREQ_2,0x88
  2440. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2441. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2442. CLK_IND, RUN, FREQ_2, 0x88
  2443. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2444. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2445. CRT,RUN,LATCH_DATA, 0x00
  2446.  
  2447.  
  2448.  
  2449. [1024,768,16,56,70]
  2450. # Unlock CRTC
  2451. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2452. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2453. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2454. # Dump CRT Controller Registers
  2455. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2456. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2457. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2458. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2459. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2460. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  2461. CRT,RUN,MODE_CONTROL,0x02
  2462. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2463. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2464. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2465. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2466. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2467. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2468. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2469. # Lock CRTC Reg 11 for compatibility
  2470. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2471. # Dump ENG Register
  2472. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2473. # Dump MISCOUT Register
  2474. DIR,RUN,MISC_WRITE,0xef
  2475. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2476. CLK_IND, RUN, FREQ_2,0x88
  2477. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2478. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2479. CLK_IND, RUN, FREQ_2, 0x88
  2480. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2481. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2482. CRT,RUN,LATCH_DATA, 0x00
  2483.  
  2484. [1024,768,16,48,60]
  2485. # Unlock CRTC
  2486. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2487. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2488. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2489. # Dump CRT Controller Registers
  2490. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2491. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2492. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2493. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2494. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2495. CRT,RUN,MISC_1,0x15,0x48,0x20,0x11
  2496. CRT,RUN,MODE_CONTROL,0x02
  2497. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2498. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2499. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2500. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2501. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2502. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2503. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2504. # Lock CRTC Reg 11 for compatibility
  2505. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2506. # Dump ENG Register
  2507. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2508. # Dump MISCOUT Register
  2509. DIR,RUN,MISC_WRITE,0xef
  2510. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2511. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2512. CLK_IND, RUN, FREQ_2, 0x7E
  2513. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2514. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2515. CRT,RUN,LATCH_DATA, 0x00
  2516.  
  2517. [1024,768,8,96,120]
  2518. # Unlock CRTC
  2519. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2520. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2521. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2522. # Dump CRT Controller Registers
  2523. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  2524. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2525. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  2526. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2527. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2528. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  2529. CRT,RUN,MODE_CONTROL,0x02
  2530. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2531. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2532. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2533. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2534. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2535. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2536. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2537. # Lock CRTC Reg 11 for compatibility
  2538. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2539. # Dump ENG Register
  2540. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2541. # Dump MISCOUT Register
  2542. DIR,RUN,MISC_WRITE,0xef
  2543. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2544. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2545. CLK_IND, RUN, FREQ_2, 0xbd
  2546. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2547. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2548. CRT,RUN,LATCH_DATA, 0x08
  2549.  
  2550. [1024,768,8,81,100]
  2551. # Unlock CRTC
  2552. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2553. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2554. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2555. # Dump CRT Controller Registers
  2556. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  2557. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2558. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  2559. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2560. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2561. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  2562. CRT,RUN,MODE_CONTROL,0x02
  2563. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2564. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2565. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2566. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2567. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2568. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2569. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2570. # Lock CRTC Reg 11 for compatibility
  2571. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2572. # Dump ENG Register
  2573. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2574. # Dump MISCOUT Register
  2575. DIR,RUN,MISC_WRITE,0xef
  2576. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2577. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2578. CLK_IND, RUN, FREQ_2, 0xa9
  2579. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2580. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2581. CRT,RUN,LATCH_DATA, 0x08
  2582.  
  2583. [1024,768,8,64,80]
  2584. # Unlock CRTC
  2585. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2586. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2587. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2588. # Dump CRT Controller Registers
  2589. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  2590. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2591. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  2592. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2593. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2594. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2595. CRT,RUN,MODE_CONTROL,0x02
  2596. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2597. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2598. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2599. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2600. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2601. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2602. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2603. # Lock CRTC Reg 11 for compatibility
  2604. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2605. # Dump ENG Register
  2606. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2607. # Dump MISCOUT Register
  2608. DIR,RUN,MISC_WRITE,0xef
  2609. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2610. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2611. CLK_IND, RUN, FREQ_2, 0x93
  2612. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2613. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2614. CRT,RUN,LATCH_DATA, 0x08
  2615.  
  2616. [1024,768,8,60,75]
  2617. # Unlock CRTC
  2618. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2619. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2620. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2621. # Dump CRT Controller Registers
  2622. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  2623. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2624. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  2625. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  2626. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2627. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2628. CRT,RUN,MODE_CONTROL,0x02
  2629. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2630. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2631. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2632. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2633. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2634. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2635. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2636. # Lock CRTC Reg 11 for compatibility
  2637. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2638. # Dump ENG Register
  2639. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2640. # Dump MISCOUT Register
  2641. DIR,RUN,MISC_WRITE,0xef
  2642. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2643. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2644. CLK_IND, RUN, FREQ_2, 0x8c
  2645. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2646. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2647. CRT,RUN,LATCH_DATA, 0x08
  2648.  
  2649. [1024,768,8,58,72]
  2650. # Unlock CRTC
  2651. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2652. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2653. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2654. # Dump CRT Controller Registers
  2655. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  2656. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2657. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  2658. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  2659. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2660. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  2661. CRT,RUN,MODE_CONTROL,0x02
  2662. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2663. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2664. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2665. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2666. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2667. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2668. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2669. # Lock CRTC Reg 11 for compatibility
  2670. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2671. # Dump ENG Register
  2672. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2673. # Dump MISCOUT Register
  2674. DIR,RUN,MISC_WRITE,0xef
  2675. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2676. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2677. CLK_IND, RUN, FREQ_2, 0x88
  2678. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2679. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2680. CRT,RUN,LATCH_DATA, 0x08
  2681.  
  2682. [1024,768,8,56,70]
  2683. # Unlock CRTC
  2684. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2685. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2686. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2687. # Dump CRT Controller Registers
  2688. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2689. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2690. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2691. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2692. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2693. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  2694. CRT,RUN,MODE_CONTROL,0x02
  2695. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2696. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2697. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2698. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2699. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2700. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2701. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2702. # Lock CRTC Reg 11 for compatibility
  2703. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2704. # Dump ENG Register
  2705. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2706. # Dump MISCOUT Register
  2707. DIR,RUN,MISC_WRITE,0xef
  2708. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2709. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2710. CLK_IND, RUN, FREQ_2, 0x88
  2711. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2712. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2713. CRT,RUN,LATCH_DATA, 0x08
  2714.  
  2715. [1024,768,8,48,60]
  2716. # Unlock CRTC
  2717. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2718. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2719. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2720. # Dump CRT Controller Registers
  2721. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  2722. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2723. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  2724. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  2725. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2726. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  2727. CRT,RUN,MODE_CONTROL,0x02
  2728. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2729. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  2730. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2731. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2732. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2733. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2734. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2735. # Lock CRTC Reg 11 for compatibility
  2736. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2737. # Dump ENG Register
  2738. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2739. # Dump MISCOUT Register
  2740. DIR,RUN,MISC_WRITE,0xef
  2741. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2742. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2743. CLK_IND, RUN, FREQ_2, 0x7e
  2744. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2745. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2746. CRT,RUN,LATCH_DATA, 0x08
  2747.  
  2748. [800,600,32,75,120]
  2749. # Unlock CRTC
  2750. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2751. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2752. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2753. # Dump CRT Controller Registers
  2754. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2755. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2756. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2757. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2758. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2759. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2760. CRT,RUN,MODE_CONTROL,0x02
  2761. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2762. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2763. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2764. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2765. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2766. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2767. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2768. # Lock CRTC Reg 11 for compatibility
  2769. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2770. # Dump ENG Register
  2771. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2772. # Dump MISCOUT Register
  2773. DIR,RUN,MISC_WRITE,0xef
  2774. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2775. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2776. CLK_IND, RUN, FREQ_2, 0x8a
  2777. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2778. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2779. CRT,RUN,LATCH_DATA, 0x00
  2780.  
  2781. [800,600,32,64,100]
  2782. # Unlock CRTC
  2783. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2784. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2785. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2786. # Dump CRT Controller Registers
  2787. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2788. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2789. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2790. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2791. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2792. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2793. CRT,RUN,MODE_CONTROL,0x02
  2794. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2795. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2796. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2797. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2798. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2799. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2800. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2801. # Lock CRTC Reg 11 for compatibility
  2802. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2803. # Dump ENG Register
  2804. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2805. # Dump MISCOUT Register
  2806. DIR,RUN,MISC_WRITE,0xef
  2807. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2808. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2809. CLK_IND, RUN, FREQ_2, 0x7e
  2810. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2811. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2812. CRT,RUN,LATCH_DATA, 0x00
  2813.  
  2814. [800,600,32,56,90]
  2815. # Unlock CRTC
  2816. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2817. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2818. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2819. # Dump CRT Controller Registers
  2820. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2821. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2822. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2823. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2824. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2825. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2826. CRT,RUN,MODE_CONTROL,0x02
  2827. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2828. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2829. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2830. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2831. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2832. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2833. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2834. # Lock CRTC Reg 11 for compatibility
  2835. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2836. # Dump ENG Register
  2837. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2838. # Dump MISCOUT Register
  2839. DIR,RUN,MISC_WRITE,0xef
  2840. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2841. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2842. CLK_IND, RUN, FREQ_2, 0x70
  2843. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2844. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2845. CRT,RUN,LATCH_DATA, 0x00
  2846.  
  2847. [800,600,32,46,75]
  2848. # Unlock CRTC
  2849. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2850. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2851. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2852. # Dump CRT Controller Registers
  2853. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2854. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2855. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2856. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2857. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2858. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2859. CRT,RUN,MODE_CONTROL,0x02
  2860. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2861. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2862. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2863. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2864. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2865. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2866. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2867. # Lock CRTC Reg 11 for compatibility
  2868. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2869. # Dump ENG Register
  2870. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2871. # Dump MISCOUT Register
  2872. DIR,RUN,MISC_WRITE,0xef
  2873. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2874. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2875. CLK_IND, RUN, FREQ_2, 0x60
  2876. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2877. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2878. CRT,RUN,LATCH_DATA, 0x00
  2879.  
  2880. [800,600,32,48,72]
  2881. # Unlock CRTC
  2882. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2883. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2884. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2885. # Dump CRT Controller Registers
  2886. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2887. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2888. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2889. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2890. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2891. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2892. CRT,RUN,MODE_CONTROL,0x02
  2893. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2894. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2895. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2896. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2897. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2898. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2899. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2900. # Lock CRTC Reg 11 for compatibility
  2901. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2902. # Dump ENG Register
  2903. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2904. # Dump MISCOUT Register
  2905. DIR,RUN,MISC_WRITE,0xef
  2906. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2907. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2908. CLK_IND, RUN, FREQ_2, 0x61
  2909. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2910. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2911. CRT,RUN,LATCH_DATA, 0x00
  2912.  
  2913.  
  2914.  
  2915. [800,600,32,35,56]
  2916. # Unlock CRTC
  2917. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2918. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2919. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2920. # Dump CRT Controller Registers
  2921. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2922. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2923. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2924. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2925. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2926. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2927. CRT,RUN,MODE_CONTROL,0x02
  2928. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2929. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2930. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2931. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2932. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2933. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2934. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2935. # Lock CRTC Reg 11 for compatibility
  2936. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2937. # Dump ENG Register
  2938. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2939. # Dump MISCOUT Register
  2940. DIR,RUN,MISC_WRITE,0xef
  2941. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2942. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2943. CLK_IND, RUN, FREQ_2, 0x45
  2944. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2945. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2946. CRT,RUN,LATCH_DATA, 0x00
  2947.  
  2948. [800,600,32,37,60]
  2949. # Unlock CRTC
  2950. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2951. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2952. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2953. # Dump CRT Controller Registers
  2954. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2955. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2956. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2957. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2958. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2959. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2960. CRT,RUN,MODE_CONTROL,0x02
  2961. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2962. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2963. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2964. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2965. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2966. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  2967. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2968. # Lock CRTC Reg 11 for compatibility
  2969. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2970. # Dump ENG Register
  2971. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2972. # Dump MISCOUT Register
  2973. DIR,RUN,MISC_WRITE,0xef
  2974. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2975. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2976. CLK_IND, RUN, FREQ_2, 0x4D
  2977. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2978. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2979. CRT,RUN,LATCH_DATA, 0x00
  2980.  
  2981. [800,600,24,75,120]
  2982. # Unlock CRTC
  2983. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2984. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2985. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2986. # Dump CRT Controller Registers
  2987. CRT,RUN,HORZ_TOTAL,0x58,0x4c,0x4a,0x00,0x4b,0x14,0x82,0xf0,0x00,0x60
  2988. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2989. CRT,RUN,VERT_RETRACE_START,0x59,0x0b,0x57
  2990. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2991. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2992. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  2993. CRT,RUN,MODE_CONTROL,0x02
  2994. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2995. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  2996. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2997. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2998. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2999. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3000. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3001. # Lock CRTC Reg 11 for compatibility
  3002. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3003. # Dump ENG Register
  3004. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3005. # Dump MISCOUT Register
  3006. DIR,RUN,MISC_WRITE,0xef
  3007. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3008. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3009. CLK_IND, RUN, FREQ_2, 0x8a
  3010. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3011. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3012. CRT,RUN,LATCH_DATA, 0x00
  3013.  
  3014.  
  3015. [800,600,24,64,100]
  3016. # Unlock CRTC
  3017. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3018. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3019. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3020. # Dump CRT Controller Registers
  3021. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x50,0x19,0x7a,0xf0,0x00,0x60
  3022. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3023. CRT,RUN,VERT_RETRACE_START,0x59,0x08,0x57
  3024. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3025. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3026. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3027. CRT,RUN,MODE_CONTROL,0x02
  3028. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3029. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3030. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3031. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3032. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3033. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3034. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3035. # Lock CRTC Reg 11 for compatibility
  3036. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3037. # Dump ENG Register
  3038. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3039. # Dump MISCOUT Register
  3040. DIR,RUN,MISC_WRITE,0xef
  3041. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3042. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3043. CLK_IND, RUN, FREQ_2, 0x7e
  3044. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3045. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3046. CRT,RUN,LATCH_DATA, 0x00
  3047.  
  3048.  
  3049. [800,600,24,56,90]
  3050. # Unlock CRTC
  3051. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3052. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3053. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3054. # Dump CRT Controller Registers
  3055. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4e,0x1a,0x6f,0xf0,0x00,0x60
  3056. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3057. CRT,RUN,VERT_RETRACE_START,0x57,0x09,0x57
  3058. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3059. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3060. CRT,RUN,MISC_1,0x15,0x55,0x2f,0x11
  3061. CRT,RUN,MODE_CONTROL,0x02
  3062. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3063. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3064. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3065. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3066. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3067. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3068. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3069. # Lock CRTC Reg 11 for compatibility
  3070. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3071. # Dump ENG Register
  3072. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3073. # Dump MISCOUT Register
  3074. DIR,RUN,MISC_WRITE,0xef
  3075. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3076. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3077. CLK_IND, RUN, FREQ_2, 0x70
  3078. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3079. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3080. CRT,RUN,LATCH_DATA, 0x00
  3081.  
  3082.  
  3083. [800,600,24,46,75]
  3084. # Unlock CRTC
  3085. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3086. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3087. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3088. # Dump CRT Controller Registers
  3089. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4d,0x15,0x6f,0xe0,0x00,0x60
  3090. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3091. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  3092. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3093. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3094. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3095. CRT,RUN,MODE_CONTROL,0x02
  3096. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3097. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3098. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3099. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3100. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3101. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3102. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3103. # Lock CRTC Reg 11 for compatibility
  3104. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3105. # Dump ENG Register
  3106. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3107. # Dump MISCOUT Register
  3108. DIR,RUN,MISC_WRITE,0xef
  3109. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3110. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3111. CLK_IND, RUN, FREQ_2, 0x60
  3112. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3113. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3114. CRT,RUN,LATCH_DATA, 0x00
  3115.  
  3116.  
  3117. [800,600,24,48,72]
  3118. # Unlock CRTC
  3119. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3120. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3121. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3122. # Dump CRT Controller Registers
  3123. ##CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4e,0x1a,0x8e,0xf0,0x00,0x60
  3124. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x80,0x52,0x1d,0x98,0xf0,0x00,0x60
  3125. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3126. ##CRT,RUN,VERT_RETRACE_START,0x71,0x27,0x57
  3127. CRT,RUN,VERT_RETRACE_START,0x7c,0x02,0x57
  3128. ##CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3129. CRT,RUN,UNDERLINE_LOCATION,0x00,0x58,0x00,0xe3,0xff
  3130. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3131. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3132. CRT,RUN,MODE_CONTROL,0x02
  3133. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3134. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3135. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3136. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3137. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3138. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3139. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3140. # Lock CRTC Reg 11 for compatibility
  3141. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3142. # Dump ENG Register
  3143. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3144. # Dump MISCOUT Register
  3145. DIR,RUN,MISC_WRITE,0xef
  3146. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3147. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3148. ##CLK_IND, RUN, FREQ_2, 0x61
  3149. CLK_IND, RUN, FREQ_2, 0x62
  3150. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3151. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3152. CRT,RUN,LATCH_DATA, 0x00
  3153.  
  3154. [800,600,24,37,60]
  3155. # Unlock CRTC
  3156. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3157. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3158. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3159. # Dump CRT Controller Registers
  3160. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4e,0x1a,0x72,0xf0,0x00,0x60
  3161. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3162. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3163. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3164. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3165. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3166. CRT,RUN,MODE_CONTROL,0x02
  3167. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3168. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3169. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3170. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3171. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3172. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3173. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3174. # Lock CRTC Reg 11 for compatibility
  3175. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3176. # Dump ENG Register
  3177. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3178. # Dump MISCOUT Register
  3179. DIR,RUN,MISC_WRITE,0xef
  3180. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3181. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3182. CLK_IND, RUN, FREQ_2, 0x4d
  3183. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3184. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3185. CRT,RUN,LATCH_DATA, 0x00
  3186.  
  3187.  
  3188. [800,600,24,35,56]
  3189. # Unlock CRTC
  3190. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3191. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3192. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3193. # Dump CRT Controller Registers
  3194. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4d,0x16,0x72,0xf0,0x00,0x60
  3195. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3196. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3197. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3198. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  3199. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  3200. CRT,RUN,MODE_CONTROL,0x02
  3201. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3202. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3203. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3204. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3205. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3206. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3207. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3208. # Lock CRTC Reg 11 for compatibility
  3209. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3210. # Dump ENG Register
  3211. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3212. # Dump MISCOUT Register
  3213. DIR,RUN,MISC_WRITE,0xef
  3214. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3215. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3216. CLK_IND, RUN, FREQ_2, 0x45
  3217. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3218. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3219. CRT,RUN,LATCH_DATA, 0x00
  3220.  
  3221.  
  3222.  
  3223. [800,600,16,75,120]
  3224. # Unlock CRTC
  3225. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3226. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3227. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3228. # Dump CRT Controller Registers
  3229. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  3230. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3231. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  3232. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3233. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3234. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3235. CRT,RUN,MODE_CONTROL,0x02
  3236. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3237. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3238. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3239. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3240. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3241. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3242. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3243. # Lock CRTC Reg 11 for compatibility
  3244. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3245. # Dump ENG Register
  3246. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3247. # Dump MISCOUT Register
  3248. DIR,RUN,MISC_WRITE,0xef
  3249. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3250. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3251. CLK_IND, RUN, FREQ_2, 0x8a
  3252. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3253. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3254. CRT,RUN,LATCH_DATA, 0x00
  3255.  
  3256. [800,600,16,64,100]
  3257. # Unlock CRTC
  3258. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3259. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3260. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3261. # Dump CRT Controller Registers
  3262. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  3263. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3264. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  3265. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3266. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3267. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  3268. CRT,RUN,MODE_CONTROL,0x02
  3269. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3270. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3271. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3272. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3273. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3274. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3275. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3276. # Lock CRTC Reg 11 for compatibility
  3277. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3278. # Dump ENG Register
  3279. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3280. # Dump MISCOUT Register
  3281. DIR,RUN,MISC_WRITE,0xef
  3282. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3283. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3284. CLK_IND, RUN, FREQ_2, 0x7e
  3285. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3286. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3287. CRT,RUN,LATCH_DATA, 0x00
  3288.  
  3289. [800,600,16,56,90]
  3290. # Unlock CRTC
  3291. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3292. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3293. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3294. # Dump CRT Controller Registers
  3295. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  3296. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3297. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  3298. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3299. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3300. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3301. CRT,RUN,MODE_CONTROL,0x02
  3302. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3303. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3304. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3305. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3306. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3307. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3308. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3309. # Lock CRTC Reg 11 for compatibility
  3310. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3311. # Dump ENG Register
  3312. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3313. # Dump MISCOUT Register
  3314. DIR,RUN,MISC_WRITE,0xef
  3315. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3316. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3317. CLK_IND, RUN, FREQ_2, 0x70
  3318. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3319. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3320. CRT,RUN,LATCH_DATA, 0x00
  3321.  
  3322. [800,600,16,46,75]
  3323. # Unlock CRTC
  3324. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3325. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3326. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3327. # Dump CRT Controller Registers
  3328. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  3329. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3330. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  3331. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3332. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3333. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3334. CRT,RUN,MODE_CONTROL,0x02
  3335. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3336. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3337. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3338. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3339. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3340. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3341. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3342. # Lock CRTC Reg 11 for compatibility
  3343. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3344. # Dump ENG Register
  3345. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3346. # Dump MISCOUT Register
  3347. DIR,RUN,MISC_WRITE,0xef
  3348. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3349. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3350. CLK_IND, RUN, FREQ_2, 0x60
  3351. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3352. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3353. CRT,RUN,LATCH_DATA, 0x00
  3354.  
  3355. [800,600,16,48,72]
  3356. # Unlock CRTC
  3357. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3358. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3359. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3360. # Dump CRT Controller Registers
  3361. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  3362. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3363. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  3364. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3365. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3366. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3367. CRT,RUN,MODE_CONTROL,0x02
  3368. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3369. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3370. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3371. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3372. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3373. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3374. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3375. # Lock CRTC Reg 11 for compatibility
  3376. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3377. # Dump ENG Register
  3378. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3379. # Dump MISCOUT Register
  3380. DIR,RUN,MISC_WRITE,0xef
  3381. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3382. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3383. CLK_IND, RUN, FREQ_2, 0x61
  3384. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3385. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3386. CRT,RUN,LATCH_DATA, 0x00
  3387.  
  3388. [800,600,16,35,56]
  3389. # Unlock CRTC
  3390. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3391. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3392. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3393. # Dump CRT Controller Registers
  3394. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  3395. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3396. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  3397. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3398. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3399. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3400. CRT,RUN,MODE_CONTROL,0x02
  3401. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3402. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3403. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3404. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3405. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3406. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3407. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3408. # Lock CRTC Reg 11 for compatibility
  3409. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3410. # Dump ENG Register
  3411. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3412. # Dump MISCOUT Register
  3413. DIR,RUN,MISC_WRITE,0xef
  3414. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3415. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3416. CLK_IND, RUN, FREQ_2, 0x45
  3417. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3418. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3419. CRT,RUN,LATCH_DATA, 0x00
  3420.  
  3421. [800,600,16,37,60]
  3422. # Unlock CRTC
  3423. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3424. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3425. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3426. # Dump CRT Controller Registers
  3427. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  3428. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3429. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3430. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3431. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3432. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3433. CRT,RUN,MODE_CONTROL,0x02
  3434. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3435. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3436. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3437. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3438. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3439. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  3440. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3441. # Lock CRTC Reg 11 for compatibility
  3442. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3443. # Dump ENG Register
  3444. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3445. # Dump MISCOUT Register
  3446. DIR,RUN,MISC_WRITE,0xef
  3447. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3448. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3449. CLK_IND, RUN, FREQ_2, 0x4D
  3450. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3451. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3452. CRT,RUN,LATCH_DATA, 0x00
  3453.  
  3454. [800,600,8,75,120]
  3455. # Unlock CRTC
  3456. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3457. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3458. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3459. # Dump CRT Controller Registers
  3460. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  3461. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3462. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  3463. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3464. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3465. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3466. CRT,RUN,MODE_CONTROL,0x02
  3467. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3468. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3469. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3470. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3471. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3472. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3473. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3474. # Lock CRTC Reg 11 for compatibility
  3475. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3476. # Dump ENG Register
  3477. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3478. # Dump MISCOUT Register
  3479. DIR,RUN,MISC_WRITE,0xef
  3480. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3481. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3482. CLK_IND, RUN, FREQ_2, 0x8a
  3483. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3484. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3485. CRT,RUN,LATCH_DATA, 0x08
  3486.  
  3487. [800,600,8,64,100]
  3488. # Unlock CRTC
  3489. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3490. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3491. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3492. # Dump CRT Controller Registers
  3493. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  3494. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3495. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  3496. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3497. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3498. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  3499. CRT,RUN,MODE_CONTROL,0x02
  3500. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3501. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3502. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3503. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3504. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3505. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3506. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3507. # Lock CRTC Reg 11 for compatibility
  3508. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3509. # Dump ENG Register
  3510. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3511. # Dump MISCOUT Register
  3512. DIR,RUN,MISC_WRITE,0xef
  3513. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3514. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3515. CLK_IND, RUN, FREQ_2, 0x7e
  3516. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3517. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3518. CRT,RUN,LATCH_DATA, 0x08
  3519.  
  3520. [800,600,8,56,90]
  3521. # Unlock CRTC
  3522. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3523. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3524. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3525. # Dump CRT Controller Registers
  3526. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  3527. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3528. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  3529. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3530. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3531. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3532. CRT,RUN,MODE_CONTROL,0x02
  3533. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3534. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3535. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3536. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3537. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3538. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3539. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3540. # Lock CRTC Reg 11 for compatibility
  3541. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3542. # Dump ENG Register
  3543. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3544. # Dump MISCOUT Register
  3545. DIR,RUN,MISC_WRITE,0xef
  3546. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3547. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3548. CLK_IND, RUN, FREQ_2, 0x70
  3549. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3550. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3551. CRT,RUN,LATCH_DATA, 0x08
  3552.  
  3553. [800,600,8,46,75]
  3554. # Unlock CRTC
  3555. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3556. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3557. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3558. # Dump CRT Controller Registers
  3559. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  3560. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3561. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  3562. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3563. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3564. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3565. CRT,RUN,MODE_CONTROL,0x02
  3566. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3567. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3568. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3569. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3570. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3571. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3572. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3573. # Lock CRTC Reg 11 for compatibility
  3574. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3575. # Dump ENG Register
  3576. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3577. # Dump MISCOUT Register
  3578. DIR,RUN,MISC_WRITE,0xef
  3579. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3580. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3581. CLK_IND, RUN, FREQ_2, 0x60
  3582. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3583. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3584. CRT,RUN,LATCH_DATA, 0x08
  3585.  
  3586. [800,600,8,48,72]
  3587. # Unlock CRTC
  3588. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3589. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3590. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3591. # Dump CRT Controller Registers
  3592. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  3593. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3594. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  3595. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3596. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3597. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3598. CRT,RUN,MODE_CONTROL,0x02
  3599. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3600. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3601. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3602. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3603. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3604. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3605. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3606. # Lock CRTC Reg 11 for compatibility
  3607. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3608. # Dump ENG Register
  3609. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3610. # Dump MISCOUT Register
  3611. DIR,RUN,MISC_WRITE,0xef
  3612. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3613. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3614. CLK_IND, RUN, FREQ_2, 0x61
  3615. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3616. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3617. CRT,RUN,LATCH_DATA, 0x08
  3618.  
  3619. [800,600,8,37,60]
  3620. # Unlock CRTC
  3621. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3622. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3623. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3624. # Dump CRT Controller Registers
  3625. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  3626. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3627. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  3628. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3629. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3630. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  3631. CRT,RUN,MODE_CONTROL,0x02
  3632. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3633. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3634. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  3635. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3636. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3637. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3638. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3639. # Lock CRTC Reg 11 for compatibility
  3640. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3641. # Dump ENG Register
  3642. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3643. # Dump MISCOUT Register
  3644. DIR,RUN,MISC_WRITE,0xef
  3645. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3646. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3647. CLK_IND, RUN, FREQ_2, 0x4D
  3648. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3649. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3650. CRT,RUN,LATCH_DATA, 0x08
  3651.  
  3652. [800,600,8,35,56]
  3653. # Unlock CRTC
  3654. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3655. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3656. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3657. # Dump CRT Controller Registers
  3658. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  3659. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3660. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  3661. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  3662. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  3663. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  3664. CRT,RUN,MODE_CONTROL,0x02
  3665. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3666. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3667. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3668. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3669. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3670. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3671. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3672. # Lock CRTC Reg 11 for compatibility
  3673. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3674. # Dump ENG Register
  3675. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3676. # Dump MISCOUT Register
  3677. DIR,RUN,MISC_WRITE,0xef
  3678. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3679. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3680. CLK_IND, RUN, FREQ_2, 0x45
  3681. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3682. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3683. CRT,RUN,LATCH_DATA, 0x08
  3684.  
  3685. [640,480,32,64,120]
  3686. # Unlock CRTC
  3687. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3688. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3689. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3690. # Dump CRT Controller Registers
  3691. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3692. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3693. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3694. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3695. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3696. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3697. CRT,RUN,MODE_CONTROL,0x02
  3698. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3699. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3700. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3701. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3702. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3703. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3704. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3705. # Lock CRTC Reg 11 for compatibility
  3706. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3707. # Dump ENG Register
  3708. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3709. # Dump MISCOUT Register
  3710. DIR,RUN,MISC_WRITE,0xef
  3711. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3712. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3713. CLK_IND, RUN, FREQ_2, 0x67
  3714. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3715. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3716. CRT,RUN,LATCH_DATA, 0x00
  3717.  
  3718. [640,480,32,52,100]
  3719. # Unlock CRTC
  3720. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3721. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3722. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3723. # Dump CRT Controller Registers
  3724. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3725. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3726. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3727. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3728. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3729. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  3730. CRT,RUN,MODE_CONTROL,0x02
  3731. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3732. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3733. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3734. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3735. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3736. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3737. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3738. # Lock CRTC Reg 11 for compatibility
  3739. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3740. # Dump ENG Register
  3741. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3742. # Dump MISCOUT Register
  3743. DIR,RUN,MISC_WRITE,0xef
  3744. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3745. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3746. CLK_IND, RUN, FREQ_2, 0x50
  3747. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3748. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3749. CRT,RUN,LATCH_DATA, 0x00
  3750.  
  3751. [640,480,32,48,90]
  3752. # Unlock CRTC
  3753. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3754. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3755. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3756. # Dump CRT Controller Registers
  3757. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3758. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3759. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3760. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3761. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3762. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3763. CRT,RUN,MODE_CONTROL,0x02
  3764. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3765. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3766. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3767. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3768. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3769. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3770. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3771. # Lock CRTC Reg 11 for compatibility
  3772. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3773. # Dump ENG Register
  3774. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3775. # Dump MISCOUT Register
  3776. DIR,RUN,MISC_WRITE,0xef
  3777. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3778. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3779. CLK_IND, RUN, FREQ_2, 0x4d
  3780. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3781. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3782. CRT,RUN,LATCH_DATA, 0x00
  3783.  
  3784. [640,480,32,37,75]
  3785. # Unlock CRTC
  3786. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3787. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3788. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3789. # Dump CRT Controller Registers
  3790. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3791. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3792. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3793. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3794. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3795. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3796. CRT,RUN,MODE_CONTROL,0x02
  3797. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3798. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3799. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3800. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3801. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3802. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3803. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3804. # Lock CRTC Reg 11 for compatibility
  3805. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3806. # Dump ENG Register
  3807. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3808. # Dump MISCOUT Register
  3809. DIR,RUN,MISC_WRITE,0xef
  3810. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3811. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3812. CLK_IND, RUN, FREQ_2, 0x3a
  3813. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3814. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3815. CRT,RUN,LATCH_DATA, 0x00
  3816.  
  3817. [640,480,32,37,72]
  3818. # Unlock CRTC
  3819. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3820. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3821. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3822. # Dump CRT Controller Registers
  3823. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3824. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3825. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3826. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3827. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3828. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3829. CRT,RUN,MODE_CONTROL,0x02
  3830. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3831. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3832. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3833. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3834. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3835. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3836. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3837. # Lock CRTC Reg 11 for compatibility
  3838. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3839. # Dump ENG Register
  3840. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3841. # Dump MISCOUT Register
  3842. DIR,RUN,MISC_WRITE,0xef
  3843. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3844. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3845. CLK_IND, RUN, FREQ_2, 0x3a
  3846. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3847. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3848. CRT,RUN,LATCH_DATA, 0x00
  3849.  
  3850. [640,480,32,31,60]
  3851. # Unlock CRTC
  3852. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3853. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3854. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3855. # Dump CRT Controller Registers
  3856. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3857. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3858. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3859. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3860. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3861. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3862. CRT,RUN,MODE_CONTROL,0x02
  3863. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3864. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  3865. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3866. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3867. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3868. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  3869. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3870. # Lock CRTC Reg 11 for compatibility
  3871. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3872. # Dump ENG Register
  3873. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3874. # Dump MISCOUT Register
  3875. DIR,RUN,MISC_WRITE,0xef
  3876. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3877. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3878. CLK_IND, RUN, FREQ_2, 0x21
  3879. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3880. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3881. CRT,RUN,LATCH_DATA, 0x00
  3882.  
  3883. [640,480,24,64,120]
  3884. # Unlock CRTC
  3885. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3886. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3887. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3888. # Dump CRT Controller Registers
  3889. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x12,0x3e,0x00,0x40
  3890. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3891. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3892. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0c,0xab,0xff
  3893. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3894. CRT,RUN,MISC_1,0x15,0x58,0x24,0x11
  3895. CRT,RUN,MODE_CONTROL,0x02
  3896. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3897. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3898. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3899. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3900. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3901. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  3902. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3903. # Lock CRTC Reg 11 for compatibility
  3904. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3905. # Dump ENG Register
  3906. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3907. # Dump MISCOUT Register
  3908. DIR,RUN,MISC_WRITE,0xef
  3909. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3910. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3911. CLK_IND, RUN, FREQ_2, 0x67
  3912. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3913. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3914. CRT,RUN,LATCH_DATA, 0x00
  3915.  
  3916.  
  3917. [640,480,24,52,100]
  3918. # Unlock CRTC
  3919. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3920. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3921. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3922. # Dump CRT Controller Registers
  3923. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3d,0x03,0x06,0x3e,0x00,0x40
  3924. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3925. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3926. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x00,0xab,0xff
  3927. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3928. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  3929. CRT,RUN,MODE_CONTROL,0x02
  3930. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3931. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3932. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3933. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3934. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3935. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3936. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3937. # Lock CRTC Reg 11 for compatibility
  3938. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3939. # Dump ENG Register
  3940. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3941. # Dump MISCOUT Register
  3942. DIR,RUN,MISC_WRITE,0xef
  3943. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3944. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3945. CLK_IND, RUN, FREQ_2, 0x50
  3946. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3947. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3948. CRT,RUN,LATCH_DATA, 0x00
  3949.  
  3950. [640,480,24,48,90]
  3951. # Unlock CRTC
  3952. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3953. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3954. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3955. # Dump CRT Controller Registers
  3956. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x14,0x3e,0x00,0x40
  3957. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3958. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3959. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3960. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3961. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  3962. CRT,RUN,MODE_CONTROL,0x02
  3963. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3964. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3965. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3966. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3967. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3968. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  3969. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3970. # Lock CRTC Reg 11 for compatibility
  3971. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3972. # Dump ENG Register
  3973. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3974. # Dump MISCOUT Register
  3975. DIR,RUN,MISC_WRITE,0xef
  3976. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  3977. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3978. CLK_IND, RUN, FREQ_2, 0x4d
  3979. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3980. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3981. CRT,RUN,LATCH_DATA, 0x00
  3982.  
  3983.  
  3984. [640,480,24,37,75]
  3985. # Unlock CRTC
  3986. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3987. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3988. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3989. # Dump CRT Controller Registers
  3990. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8f,0x3d,0x03,0xf2,0x1f,0x00,0x40
  3991. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3992. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3993. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe0,0xf3,0xab,0xff
  3994. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  3995. CRT,RUN,MISC_1,0x15,0x45,0x24,0x11
  3996. CRT,RUN,MODE_CONTROL,0x02
  3997. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3998. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  3999. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4000. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4001. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4002. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  4003. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4004. # Lock CRTC Reg 11 for compatibility
  4005. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4006. # Dump ENG Register
  4007. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4008. # Dump MISCOUT Register
  4009. DIR,RUN,MISC_WRITE,0xef
  4010. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  4011. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4012. CLK_IND, RUN, FREQ_2, 0x39
  4013. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4014. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4015. CRT,RUN,LATCH_DATA, 0x00
  4016.  
  4017.  
  4018. [640,480,24,37,72]
  4019. # Unlock CRTC
  4020. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4021. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4022. CRT,RUN,REG_LOCK_1,0x48,0xa0
  4023. # Dump CRT Controller Registers
  4024. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x3d,0x01,0x06,0x3e,0x00,0x40
  4025. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4026. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  4027. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  4028. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  4029. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  4030. CRT,RUN,MODE_CONTROL,0x02
  4031. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4032. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  4033. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4034. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4035. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4036. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  4037. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4038. # Lock CRTC Reg 11 for compatibility
  4039. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4040. # Dump ENG Register
  4041. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4042. # Dump MISCOUT Register
  4043. DIR,RUN,MISC_WRITE,0xef
  4044. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  4045. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4046. CLK_IND, RUN, FREQ_2, 0x3a
  4047. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4048. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4049. CRT,RUN,LATCH_DATA, 0x00
  4050.  
  4051. [640,480,24,31,60]
  4052. # Unlock CRTC
  4053. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4054. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4055. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4056. # Dump CRT Controller Registers
  4057. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3e,0x07,0x0b,0x3e,0x00,0x40
  4058. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4059. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  4060. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe0,0x0c,0xab,0xff
  4061. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  4062. CRT,RUN,MISC_1,0x15,0x41,0x24,0x11
  4063. CRT,RUN,MODE_CONTROL,0x02
  4064. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4065. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x72
  4066. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4067. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4068. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4069. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  4070. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4071. # Lock CRTC Reg 11 for compatibility
  4072. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4073. # Dump ENG Register
  4074. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4075. # Dump MISCOUT Register
  4076. DIR,RUN,MISC_WRITE,0xef
  4077. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  4078. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4079. CLK_IND, RUN, FREQ_2, 0x21
  4080. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4081. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4082. CRT,RUN,LATCH_DATA, 0x00
  4083.  
  4084. [640,480,16,64,120]
  4085. # Unlock CRTC
  4086. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4087. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4088. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4089. # Dump CRT Controller Registers
  4090. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4091. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4092. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  4093. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  4094. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4095. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4096. CRT,RUN,MODE_CONTROL,0x02
  4097. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4098. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4099. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4100. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4101. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4102. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4103. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4104. # Lock CRTC Reg 11 for compatibility
  4105. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4106. # Dump ENG Register
  4107. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4108. # Dump MISCOUT Register
  4109. DIR,RUN,MISC_WRITE,0xef
  4110. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4111. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4112. CLK_IND, RUN, FREQ_2, 0x67
  4113. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4114. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4115. CRT,RUN,LATCH_DATA, 0x00
  4116.  
  4117. [640,480,16,52,100]
  4118. # Unlock CRTC
  4119. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4120. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4121. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4122. # Dump CRT Controller Registers
  4123. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  4124. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4125. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  4126. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  4127. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4128. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  4129. CRT,RUN,MODE_CONTROL,0x02
  4130. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4131. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4132. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4133. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4134. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4135. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4136. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4137. # Lock CRTC Reg 11 for compatibility
  4138. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4139. # Dump ENG Register
  4140. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4141. # Dump MISCOUT Register
  4142. DIR,RUN,MISC_WRITE,0xef
  4143. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4144. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4145. CLK_IND, RUN, FREQ_2, 0x50
  4146. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4147. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4148. CRT,RUN,LATCH_DATA, 0x00
  4149.  
  4150. [640,480,16,48,90]
  4151. # Unlock CRTC
  4152. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4153. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4154. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4155. # Dump CRT Controller Registers
  4156. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4157. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4158. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  4159. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  4160. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4161. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4162. CRT,RUN,MODE_CONTROL,0x02
  4163. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4164. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4165. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4166. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4167. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4168. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4169. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4170. # Lock CRTC Reg 11 for compatibility
  4171. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4172. # Dump ENG Register
  4173. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4174. # Dump MISCOUT Register
  4175. DIR,RUN,MISC_WRITE,0xef
  4176. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4177. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4178. CLK_IND, RUN, FREQ_2, 0x4d
  4179. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4180. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4181. CRT,RUN,LATCH_DATA, 0x00
  4182.  
  4183. [640,480,16,37,75]
  4184. # Unlock CRTC
  4185. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4186. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4187. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4188. # Dump CRT Controller Registers
  4189. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  4190. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4191. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  4192. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  4193. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4194. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4195. CRT,RUN,MODE_CONTROL,0x02
  4196. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4197. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4198. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4199. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4200. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4201. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4202. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4203. # Lock CRTC Reg 11 for compatibility
  4204. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4205. # Dump ENG Register
  4206. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4207. # Dump MISCOUT Register
  4208. DIR,RUN,MISC_WRITE,0xef
  4209. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4210. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4211. CLK_IND, RUN, FREQ_2, 0x3a
  4212. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4213. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4214. CRT,RUN,LATCH_DATA, 0x00
  4215.  
  4216. [640,480,16,37,72]
  4217. # Unlock CRTC
  4218. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4219. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4220. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4221. # Dump CRT Controller Registers
  4222. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  4223. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4224. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  4225. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  4226. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4227. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4228. CRT,RUN,MODE_CONTROL,0x02
  4229. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4230. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4231. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4232. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4233. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4234. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4235. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4236. # Lock CRTC Reg 11 for compatibility
  4237. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4238. # Dump ENG Register
  4239. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4240. # Dump MISCOUT Register
  4241. DIR,RUN,MISC_WRITE,0xef
  4242. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4243. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4244. CLK_IND, RUN, FREQ_2, 0x3a
  4245. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4246. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4247. CRT,RUN,LATCH_DATA, 0x00
  4248.  
  4249. [640,480,16,31,60]
  4250. # Unlock CRTC
  4251. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4252. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4253. CRT,RUN,REG_LOCK_1,0x48,0xA5
  4254. # Dump CRT Controller Registers
  4255. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  4256. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4257. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  4258. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  4259. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4260. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4261. CRT,RUN,MODE_CONTROL,0x02
  4262. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4263. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4264. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4265. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4266. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4267. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4268. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4269. # Lock CRTC Reg 11 for compatibility
  4270. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4271. # Dump ENG Register
  4272. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4273. # Dump MISCOUT Register
  4274. DIR,RUN,MISC_WRITE,0xef
  4275. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4276. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4277. CLK_IND, RUN, FREQ_2, 0x21
  4278. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4279. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4280. CRT,RUN,LATCH_DATA, 0x00
  4281.  
  4282. [640,480,8,64,120]
  4283. # Unlock CRTC
  4284. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4285. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4286. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4287. # Dump CRT Controller Registers
  4288. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4289. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4290. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  4291. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  4292. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4293. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4294. CRT,RUN,MODE_CONTROL,0x02
  4295. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4296. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4297. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4298. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4299. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4300. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4301. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4302. # Lock CRTC Reg 11 for compatibility
  4303. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4304. # Dump ENG Register
  4305. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4306. # Dump MISCOUT Register
  4307. DIR,RUN,MISC_WRITE,0xef
  4308. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4309. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4310. CLK_IND, RUN, FREQ_2, 0x67
  4311. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4312. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4313. CRT,RUN,LATCH_DATA, 0x08
  4314.  
  4315. [640,480,8,52,100]
  4316. # Unlock CRTC
  4317. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4318. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4319. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4320. # Dump CRT Controller Registers
  4321. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  4322. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4323. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  4324. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  4325. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4326. CRT,RUN,MISC_1,0x15,0x28,0x40,0x11
  4327. CRT,RUN,MODE_CONTROL,0x02
  4328. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4329. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4330. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4331. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4332. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4333. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4334. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4335. # Lock CRTC Reg 11 for compatibility
  4336. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4337. # Dump ENG Register
  4338. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4339. # Dump MISCOUT Register
  4340. DIR,RUN,MISC_WRITE,0xef
  4341. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4342. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4343. CLK_IND, RUN, FREQ_2, 0x50
  4344. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4345. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4346. CRT,RUN,LATCH_DATA, 0x08
  4347.  
  4348. [640,480,8,48,90]
  4349. # Unlock CRTC
  4350. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4351. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4352. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4353. # Dump CRT Controller Registers
  4354. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  4355. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4356. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  4357. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  4358. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4359. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4360. CRT,RUN,MODE_CONTROL,0x02
  4361. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4362. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4363. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4364. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4365. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4366. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4367. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4368. # Lock CRTC Reg 11 for compatibility
  4369. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4370. # Dump ENG Register
  4371. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4372. # Dump MISCOUT Register
  4373. DIR,RUN,MISC_WRITE,0xef
  4374. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4375. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4376. CLK_IND, RUN, FREQ_2, 0x4d
  4377. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4378. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4379. CRT,RUN,LATCH_DATA, 0x08
  4380.  
  4381. [640,480,8,37,75]
  4382. # Unlock CRTC
  4383. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4384. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4385. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4386. # Dump CRT Controller Registers
  4387. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  4388. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4389. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  4390. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  4391. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4392. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4393. CRT,RUN,MODE_CONTROL,0x02
  4394. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4395. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4396. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4397. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4398. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4399. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4400. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4401. # Lock CRTC Reg 11 for compatibility
  4402. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4403. # Dump ENG Register
  4404. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4405. # Dump MISCOUT Register
  4406. DIR,RUN,MISC_WRITE,0xef
  4407. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4408. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4409. CLK_IND, RUN, FREQ_2, 0x3a
  4410. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4411. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4412. CRT,RUN,LATCH_DATA, 0x08
  4413.  
  4414. [640,480,8,37,72]
  4415. # Unlock CRTC
  4416. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4417. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4418. CRT,RUN,REG_LOCK_1,0x48,0xa5
  4419. # Dump CRT Controller Registers
  4420. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  4421. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4422. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  4423. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  4424. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4425. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  4426. CRT,RUN,MODE_CONTROL,0x02
  4427. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4428. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4429. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4430. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4431. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4432. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4433. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4434. # Lock CRTC Reg 11 for compatibility
  4435. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4436. # Dump ENG Register
  4437. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4438. # Dump MISCOUT Register
  4439. DIR,RUN,MISC_WRITE,0xef
  4440. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4441. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4442. CLK_IND, RUN, FREQ_2, 0x3a
  4443. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4444. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4445. CRT,RUN,LATCH_DATA, 0x08
  4446.  
  4447. [640,480,8,31,60]
  4448. # Unlock CRTC
  4449. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  4450. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  4451. CRT,RUN,REG_LOCK_1,0x48,0xA5
  4452. # Dump CRT Controller Registers
  4453. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  4454. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  4455. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  4456. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  4457. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  4458. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  4459. CRT,RUN,MODE_CONTROL,0x02
  4460. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  4461. CRT,RMW,GENERAL_OUTPUT_PORT,0xF0,0x42
  4462. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  4463. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  4464. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  4465. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  4466. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  4467. # Lock CRTC Reg 11 for compatibility
  4468. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  4469. # Dump ENG Register
  4470. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  4471. # Dump MISCOUT Register
  4472. DIR,RUN,MISC_WRITE,0xef
  4473. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  4474. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  4475. CLK_IND, RUN, FREQ_2, 0x21
  4476. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  4477. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  4478. CRT,RUN,LATCH_DATA, 0x08
  4479.